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Patent

[deposition-selective etch-deposition process for dielectric film gapfill]

TLDR
In this paper, a deposition/etching/deposition process is provided for filling a gap in a surface of a substrate, where a liner is formed over the substrate so that distinctive reaction products are formed when it is exposed to a chemical etchant.
Abstract
A deposition/etching/deposition process is provided for filling a gap in a surface of a substrate. A liner is formed over the substrate so that distinctive reaction products are formed when it is exposed to a chemical etchant. The detection of such reaction products thus indicates that the portion of the film deposited during the first etching has been removed to an extent that further exposure to the etchant may remove the liner and expose underlying structures. Accordingly, the etching is stopped upon detection of distinctive reaction products and the next deposition in the deposition/etching/deposition process is begun.

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Citations
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Semiconductor processing systems having multiple plasma configurations

TL;DR: In this paper, the authors describe a system that includes a first plasma unit fluidly coupled with a first access of the chamber and configured to deliver a first precursor into the chamber through the first access.
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TL;DR: In this article, a system, chambers, and processes are provided for controlling process defects caused by moisture contamination in a vacuum or controlled environment, and the chambers may include configurations to provide additional processing capabilities in combination chamber designs.
References
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Patent

Thermal CVD/PECVD reactor and use for thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planarized process

TL;DR: In this paper, a single wafer, semiconductor processing reactor is described, which is capable of thermal CVD, plasmaenhanced CVD and plasma assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing.
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Reactor chamber self-cleaning process

TL;DR: In this paper, a two-step continuous etch sequence is used in which the first step uses relatively high pressure, close electrode spacing and fluorocarbon gas chemistry for etching the electodes locally and the second step uses a relatively lower pressure, farther electrode spacing, and fluorinated gas chemistry to etch throughout the chamber and exhaust system.
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Process for forming silicon oxide film

TL;DR: In this article, the authors describe a process for forming a silicon oxide film comprising the step of depositing a thin film of a silanol, a polymer thereof or a siloxane polymer, each containing an organic group, on a substrate by exciting a gas containing an organosilane or organosILoxane gas and a gas contained H and OH on the substrate in a reaction chamber to cause a reaction in a gas phase or on the substrates and removing the organic group from the thin film by plasma treatment.
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Interlayer dielectric with a composite dielectric stack

TL;DR: In this paper, a method of forming an interlayer dielectric on a semiconductor device is disclosed, where a phosphorous doped oxide layer is deposited on the semiconductor devices to fill gaps and provide phosphorous for gettering.
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CVD of silicon oxide using TEOS decomposition and in-situ planarization process

TL;DR: In this paper, a high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD and plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing.
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