Journal ArticleDOI
EEPROM as an analog storage device, with particular applications in neutral networks
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TLDR
The use of EEPROM as a compact, high-precision, nonvolatile, and reconfigurable analog storage element is investigated, with particular consideration given to the modifiable weight storage and analog multiplication problems in the hardware implementation of a neural network.Abstract:
The use of EEPROM as a compact, high-precision, nonvolatile, and reconfigurable analog storage element is investigated, with particular consideration given to the modifiable weight storage and analog multiplication problems in the hardware implementation of a neural network. Industry-standard digital EEPROM cells can be programmed to any analog value of threshold voltage, but programming characteristics of different devices on the same chip vary. The programming window of a single device also narrows with cycling. These phenomena necessitate the use of a feedback-based programming scheme. Stressing at high temperature suggests that charge retention is good even at 175 degrees C. The linear variation of threshold voltage with temperature implies that temperature compensation of EEPROM is no more complicated than its conventional MOSFET counterpart. The drain current in the saturation region is found to be a quadratic function of drain voltage when the floating-gate-to-drain overlap capacitance is adequately large. A differential circuit that uses this property to generate the multiplication function required of neural net synapses is proposed. >read more
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A Survey of Neuromorphic Computing and Neural Networks in Hardware.
Catherine D. Schuman,Thomas E. Potok,Robert M. Patton,J. Douglas Birdwell,Mark Edward Dean,Garrett S. Rose,James S. Plank +6 more
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Journal ArticleDOI
A 64-Mbit, 640-MByte/s bidirectional data strobed, double-data-rate SDRAM with a 40-mW DLL for a 256-MByte memory system
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A novel approach to controlled programming of tunnel-based floating-gate MOSFETs
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Journal ArticleDOI
A neuron-MOS neural network using self-learning-compatible synapse circuits
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References
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Journal ArticleDOI
Neural networks and physical systems with emergent collective computational abilities
TL;DR: A model of a system having a large number of simple equivalent components, based on aspects of neurobiology but readily adapted to integrated circuits, produces a content-addressable memory which correctly yields an entire memory from any subpart of sufficient size.
Journal ArticleDOI
The effect of high fields on MOS device and circuit performance
TL;DR: In this article, a simple analytical model for the MOS device characteristics including the effect of high vertical and horizontal fields on channel carrier velocity is presented, and analytical expressions for the drain current, saturation drain voltage, and transconductance are developed.
Proceedings ArticleDOI
A deep-submicrometer MOSFET model for analog/digital circuit simulations
M.-C. Jeng,P.K. Ko,C. Hu +2 more
TL;DR: An accurate drain current model for deep-submicrometers MOSFETs down to the L/sub eff/=025 mu m for digital as well as analog applications has been developed in this article.