Proceedings ArticleDOI
EvoApproxSb: Library of approximate adders and multipliers for circuit design and benchmarking of approximation methods
Vojtech Mrazek,Radek Hrbacek,Zdenek Vasicek,Lukas Sekanina +3 more
- pp 258-261
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TLDR
The EvoApprox8b library provides Verilog, Matlab and C models of all approximate circuits and the error is given for seven different error metrics.Abstract:
Approximate circuits and approximate circuit design methodologies attracted a significant attention of researchers as well as industry in recent years. In order to accelerate the approximate circuit and system design process and to support a fair benchmarking of circuit approximation methods, we propose a library of approximate adders and multipliers called EvoApprox8b. This library contains 430 non-dominated 8-bit approximate adders created from 13 conventional adders and 471 non-dominated 8-bit approximate multipliers created from 6 conventional multipliers. These implementations were evolved by a multi-objective Cartesian genetic programming. The EvoApprox8b library provides Verilog, Matlab and C models of all approximate circuits. In addition to standard circuit parameters, the error is given for seven different error metrics. The EvoApprox8b library is available at: www.fit.vutbr.cz/research/groups/ehw/approxlibread more
Citations
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Journal ArticleDOI
Approximate Arithmetic Circuits: A Survey, Characterization, and Recent Applications
TL;DR: A comprehensive survey and a comparative evaluation of recently developed approximate arithmetic circuits under different design constraints, synthesized and characterized under optimizations for performance and area.
Journal ArticleDOI
Design and Evaluation of Approximate Logarithmic Multipliers for Low Power Error-Tolerant Applications
TL;DR: The designs of both non-iterative and iterative approximate logarithmic multipliers (ALMs) are studied to further reduce power consumption and improve performance and it is found that the proposed approximate LMs with an appropriate number of inexact bits achieve higher accuracy and lower power consumption than conventional LMs using exact units.
Proceedings ArticleDOI
ALWANN: Automatic Layer-Wise Approximation of Deep Neural Network Accelerators without Retraining
TL;DR: It is demonstrated that efficient approximations can be introduced into the computational path of DNN accelerators while retraining can completely be avoided, and a simple weight updating scheme is proposed that compensates the inaccuracy introduced by employing approximate multipliers.
Journal ArticleDOI
Weight-Oriented Approximation for Energy-Efficient Neural Network Inference Accelerators
Zois-Gerasimos Tasoulas,Georgios Zervakis,Iraklis Anagnostopoulos,Hussam Amrouch,Jorg Henkel +4 more
TL;DR: A time-efficient automated framework for mapping the NN weights to the accuracy levels of the approximate reconfigurable accelerator that is able to satisfy tight accuracy loss thresholds, while significantly reducing energy consumption without any need for intensive NN retraining is proposed.
Proceedings ArticleDOI
Area-optimized low-latency approximate multipliers for FPGA-based hardware accelerators
Salim Ullah,Semeen Rehman,Bharath Srinivas Prabakaran,Florian Kriebel,Muhammad Abdullah Hanif,Muhammad Shafique,Akash Kumar +6 more
TL;DR: This paper presents a novel approximate multiplier architecture customized towards the FPGA-based fabrics, an efficient design methodology, and an open-source library that provides higher area, latency and energy gains along with better output accuracy than those offered by the state-of-the-art ASIC-based approximate multipliers.
References
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