Proceedings ArticleDOI
Flip-chip and chip-scale I/O density requirements and printed wiring board capabilities
K.V. Guinn,R.C. Frye +1 more
- pp 649-655
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TLDR
It is shown that a successful overall packaging strategy will balance the need for high density chip packaging and smaller boards against the demands that these packages will make on the routing capabilities and cost per unit area of printed wiring boards.Abstract:
Flip-chip and chip-scale packaging can increase the packaging density for integrated circuits on printed wiring boards and multichip modules. However, these approaches can result in I/O configurations that exceed the routing capabilities of the underlying board. We have examined the I/O density requirements of a wide variety of integrated circuit types. Simple linear ICs and gates are at one extreme, with few I/O and small area, and high-end microprocessors are at the other, with many I/O and large area. We analyze a representative routing escape strategy for area-array I/O, and use this analysis to determine the packaging limits of several different board technologies. Comparing these limits to the I/O configurations of various ICs in flip-chip and chip scale packages, we identify some classes of circuits (e.g., memory) that are more readily suited to conventional boards, and others (e.g., high end microprocessors) that will require very aggressive board technologies. We show that a successful overall packaging strategy will balance that need for high density chip packaging and smaller boards against the demands that these packages will make on the routing capabilities and cost per unit area of printed wiring boards.read more
Citations
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Corrosion and climatic effects in electronics
Risto Hienonen,Reima Lahtinen +1 more
TL;DR: In this paper, a method was developed for solving these problems by which both the experienced and the beginning designer can check the feasibility of the applied corrosion protection technique and foresee possible corrosion problems in the structure of the device as well as find new approaches for solving them.
Proceedings ArticleDOI
Efficient escape routing for hexagonal array of high density I/Os
Rui Shi,Chung-Kuan Cheng +1 more
TL;DR: The properties of the hexagonal array are analyzed, which can hold about 15% more I/Os compared with the traditional square grid array, and three escape routing strategies are proposed: column-by-column horizontal escape routing, two-sided horizontal/vertical escape routed, and multi-direction hybrid channel escape routing.
Efficient Escape Routing forHexagonal Array ofHighDensity I/Os
TL;DR: In this article, the authors proposed three escape routing strategies for the hexagonal array: column-by-column horizontal escaperouting, two-sided and multi-direction hybrid thenumber of escape routing layers.
Journal ArticleDOI
Escape routing design to reduce the number of layers in area array packaging
M. Horiuchi,E. Yoda,Y. Takeuchi +2 more
TL;DR: In this paper, the effect of routing manner on the layer count has been studied from an escape routing design viewpoint, and it is shown that a preferential routing creates specific pad geometry resulting in a high wiring efficiency, and that the preferential routing can be almost equivalent to that by two lines per channel with regard to wireability.
Proceedings ArticleDOI
Next generation of package/board materials technology for ultra-high density wiring and fine-pitch reliable interconnection assembly
Nitesh Kumbhat,P. Markondeya Raj,Raghuram V. Pucha,Venky Sundaram,R. Doraiswami,Swapan K. Bhattacharya,S. Hayes,S. Atmur,Suresh K. Sitaraman,Rao Tummala +9 more
TL;DR: In this article, a large-area thin carbon-silicon carbide (C-SiC) based composite boards with high elastic modulus, Si-matched CTE and large area manufacturability was evaluated with flip chip test vehicle using conventional epoxies and advanced dielectrics.
References
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Book
Printed Circuits Handbook
TL;DR: In this paper, the authors discuss the acceptability of printed circuit boards and assemblies, vendor selection and development of flexible circuit materials and fabrication, and testing assembly testing repair of bare board and board assemblies.
Proceedings ArticleDOI
A justification of, and an improvement on, a useful rule for predicting circuit-to-pin ratios
TL;DR: A rule for describing the circuit-to-pin relation has been quite useful as an aid to the packaging of electronic components in data processing machines and is expressed as XN &equil; aXBr where XB is the number of circuits and XN is theNumber of pins per package.