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Journal ArticleDOI

Improved NPC Inverters Without Short-Circuit and Dead-Time Issues

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TLDR
The proposed three-level NPC inverter has no short-circuit and dead-time issues, therefore no high voltage and current spikes are caused, and the magnitude of the output waveforms can be increased, and quality can be improved.
Abstract
The traditional neutral point clamped (NPC) inverter has short-circuit problem. The risk of short-circuit can be decreased by using dead-time in the switching signals. However, the dead-time decreases the achievable output voltage and causes distortion in the waveforms. To overcome the short-circuit problem, dual-buck NPC (DB-NPC) and split-inductor NPC (SI-NPC) inverters have been researched. However, the voltage stress of the two external diodes in the DB-NPC inverter is higher. On the other hand, the SI-NPC inverter has a problem of generating huge voltage spikes in the dead-time, which can destroy the semiconductor devices. In addition, the SI-NPC inverter cannot provide reactive power. This article presents a family of NPC inverters consisting of single-phase, three-phase, and cascaded inverters. The proposed inverters have no short-circuit and dead-time issues, therefore no high voltage and current spikes are caused. Also, the dead-time in the switching signals can be minimized. As a result, the magnitude of the output waveforms can be increased, and quality can be improved. Unlike the DB-NPC inverter, the voltage stress of all the semiconductor in the proposed inverter is lower, and unlike the SI-NPC inverter the proposed inverter provides reactive power. In this article, the proposed three-level NPC inverter is analyzed, designed, and tested. The voltage stress of the semiconductor devices in the proposed inverter is half of the source voltage, whereas in the conventional DB-NPC inverter the voltage stress of the two external diodes is the source voltage. In addition to the aforementioned benefits, the proposed cascaded inverter reduces the total number of inductors. To verify the analysis, detailed simulation, and experimental results of the proposed three-level inverter with input voltage 640 V, output power 1.2 kW, and output voltage 220 Vrms are provided.

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Citations
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Journal ArticleDOI

Improved Temperature Monitoring and Protection Method of Three-level NPC Application Based on Half-bridge IGBT Modules

TL;DR: In this article , an improved three-dimensional (3-D) coupled thermal model for insulated gate bipolar transistors (IGBTs) and related heatsink is constructed by considering the thermal coupling effects at both the device and the module level.
Journal ArticleDOI

A General Multilevel Polygonal Space Vector Generation Scheme With Reduced Switching for the Inverter and Harmonic Suppression Using a Switched-Capacitive Filter for the Full Modulation Range

TL;DR: In this paper , a general multilevel polygonal space vector generation scheme is proposed for open-end induction motor drive schemes, fed with any conventional multi-level inverter with active dc-link supply on one end and a low-voltage capacitor-fed inverter working as a switched-capacitive filter on the other end.

A General Multilevel Polygonal Space Vector Generation Scheme With Reduced Switching for the Inverter and Harmonic Suppression Using a Switched-Capacitive Filter for the Full Modulation Range

TL;DR: In this article , a general multilevel polygonal space vector generation scheme was proposed for open-end induction motor drive schemes, fed with any conventional multi-level inverter with active dc-link supply on one end and a low-voltage capacitor-fed inverter working as a switched-capacitive filter on the other end.
Journal ArticleDOI

A Novel VFVDC Optimized Full Bridge Inverter Control Strategy for Independent Solar Power Systems

TL;DR: In this paper , the perturb and observe (P&O) algorithm based on the output voltage control strategy and the proposed optimized full-bridge inverter (FBI) control strategy was combined for the independent solar power system (ISPS).
Journal ArticleDOI

Design and Implementation of Double Loop Control Strategy in TPFW Voltage and Current Regulated Inverter for Photovoltaic Application

TL;DR: In this paper , the authors proposed a double-control strategy method that utilizes a PI strategy (P) controller as a voltage controller and a proportional strategy control as a current controller, which is tested and measured by using simulation, showing a THD value of 1.07%.
References
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A New Neutral-Point-Clamped PWM Inverter

TL;DR: The neutral-point-clamped PWM inverter adopting the new PWM technique shows an excellent drive system efficiency, including motor efficiency, and is appropriate for a wide-range variable-speed drive system.
Proceedings ArticleDOI

Multilevel converters-a new breed of power converters

TL;DR: This paper presents three multilevel voltage source converters: (1) diode-clamp, (2) flying-capacitors, and (3) cascaded-inverters with separate DC sources.
Journal ArticleDOI

Z-source inverter

TL;DR: The Z-source converter employs a unique impedance network to couple the converter main circuit to the power source, thus providing unique features that cannot be obtained in the traditional voltage-source (or voltage-fed) and current-source converters where a capacitor and inductor are used, respectively.
Journal ArticleDOI

Multilevel converters for large electric drives

TL;DR: Simulation and experimental results show the superiority of the back-to-back diode-clamped converter over two-level pulsewidth-modulation-based drives.
Journal ArticleDOI

A new approach to enhance power quality for medium voltage AC drives

TL;DR: In this article, a new approach to medium-voltage variable-frequency static AC motor drives was proposed to improve the power quality of the motor by improving motor voltage and current waveforms.
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