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Open AccessJournal ArticleDOI

Low power and compact reconfigurable multiplexing devices based on silicon microring resonators

TLDR
It is shown that thermally reconfigurable multiplexing devices based on silicon microring resonators with low tuning power and low thermal crosstalk can be implemented in a compact manner by exploiting thermal isolation trenches close to the ring waveguides.
Abstract
We present thermally reconfigurable multiplexing devices based on silicon microring resonators with low tuning power and low thermal crosstalk. Micro-heaters on top of the rings are employed to tune the resonant wavelengths through the thermo-optic effect of silicon. We achieve a low tuning power of 21 mW per free spectral range for a single ring by exploiting thermal isolation trenches close to the ring waveguides. Negligible thermal crosstalk is demonstrated for rings spaced by 15 µm, enabling compact multiplexing devices. The tuning time constant is demonstrated to be less than 10 µs.

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Citations
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Journal ArticleDOI

Thermally tunable silicon racetrack resonators with ultralow tuning power

TL;DR: The use of free-standing silicon racetrack resonators with undercut structures significantly enhances the tuning efficiency, with one order of magnitude improvement of that for previously demonstrated thermo-optic devices without undercuts.
Journal ArticleDOI

Silicon-based on-chip multiplexing technologies and devices for Peta-bit optical interconnects

Daoxin Dai, +1 more
- 01 Aug 2014 - 
TL;DR: In this paper, the authors focus on the discussion of silicon-based (de) multiplexers, including WDM filters, PDM devices, and SDM devices to achieve Peta-bit optical interconnects.
Journal ArticleDOI

Open foundry platform for high-performance electronic-photonic integration

TL;DR: This paper presents photonic devices with 3 dB/cm waveguide loss fabricated in an existing commercial electronic 45 nm SOI-CMOS foundry process and demonstrates an 8-channel optical microring-resonator filter bank and optical modulators, both controlled by integrated digital circuits.
Journal ArticleDOI

Efficient and low-noise single-photon-level frequency conversion interfaces using silicon nanophotonics

TL;DR: In this article, Bragg scattering in Si3N4 microring resonators was used for low-noise frequency conversion within the 980nm band and between the 980-nm and 1,550-nm bands.
Journal ArticleDOI

Wavelength-tunable silicon microring modulator.

TL;DR: This device aims to solve the narrow bandwidth problem of silicon microcavity modulators and increase the data bandwidth in optical interconnect systems.
References
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Journal ArticleDOI

Micrometre-scale silicon electro-optic modulator

TL;DR: Electro-optic modulators are one of the most critical components in optoelectronic integration, and decreasing their size may enable novel chip architectures, and here a high-speed electro-optical modulator in compact silicon structures is experimentally demonstrated.
Journal ArticleDOI

The Past, Present, and Future of Silicon Photonics

TL;DR: In this paper, the state-of-the-art CMOS silicon-on-insulator (SOI) foundries are now being utilized in a crucial test of 1.55mum monolithic optoelectronic (OE) integration, a test sponsored by the Defense Advanced Research Projects Agency (DARPA).
Journal Article

Silicon photonics

TL;DR: The silicon chip has been the mainstay of the electronics industry for the last 40 years and has revolutionized the way the world operates as mentioned in this paper, however, any optical solution must be based on low-cost technologies if it is to be applied to the mass market.
Journal ArticleDOI

Silicon microring resonators with 1.5-microm radius.

TL;DR: In this paper, a junction between a silicon strip waveguide and an ultra-compact silicon microring resonator is demonstrated, which minimizes spurious light scattering and increases the critical dimensions of the geometry.
Journal ArticleDOI

Computer Systems Based on Silicon Photonic Interconnects

TL;DR: The power dissipation of a photonic link is explored, a roadmap to lower the energy-per-bit of silicon photonic interconnects is suggested, and the challenges that will be faced by device and circuit designers towards this goal are identified.
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