Memory array with complementary resistive switch with memristive characteristics

TLDR: The purpose is to elucidate as to how CRS is beneficial for reducing sneak path current and a novel non-linear memristive based complementary resistive switch memory model for effective simulation and analysis is described.

Abstract: Emerging solid state memory devices based on different materials and volatility has been widely acknowledged like NVRAMs (or Memristor). Evolution of new solid state ionic conductors and in particular (Memristor) brought impetus to the creation of new domain of larger storage capabilities for the future electronic systems. The achievements of these emerging technologies are kind of encouraging when compared with the existing memory types. Accordingly, a new memory architecture called Resistive Random Access Memory (ReRAM) memory faces challenges like sneak path current flowing through neighbouring cells which limits array size. To deal with such issue is to enforce a crossbar array using complementary resistive switch (CRS). CRS has recently been proclaimed as a great beneficiary to conventional charge based memories. But, the nanoscale advantage of these devices poses new challenges in designing such memories as well. In this paper, our purpose is to familiarize Memristor principle and a preliminary note on various understanding of Memristor is also described and a novel non-linear memristive based complementary resistive switch memory model for effective simulation and analysis is described. The CRS has two memristor connected in anti-serially. Four different state of CRS which significantly reduces sneak path current as compared to memristor based architecture. Here, CRSs can be viewed as primary logic building block in array and two modes of resistance states of CRS stores the information. Thus, our aim is to elucidate as to how CRS is beneficial for reducing sneak path current.