Patent
Method for forming low dielectric constant damascene structure while employing carbon doped silicon oxide planarizing stop layer
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TLDR
In this article, a hard mask layer is formed employing a plasma enhanced chemical vapor deposition (PECVD) method in turn employing an organosilane carbon and silicon source material.Abstract:
Within a damascene method for forming a patterned conductor layer having formed interposed between its patterns a dielectric layer formed of a comparatively low dielectric constant dielectric material method, there is employed a hard mask layer formed upon the dielectric layer. The hard mask layer is formed employing a plasma enhanced chemical vapor deposition (PECVD) method in turn employing an organosilane carbon and silicon source material, a substrate temperature of from about 200 to about 500 degrees centigrade and a radio frequency power of from about 100 to about 500 watts per square centimeter substrate area. The hard mask layer provides for attenuated abrasive damage to the dielectric layer.read more
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Patent
Method for integrated circuit fabrication using pitch multiplication
TL;DR: In this paper, a mixed pattern, combining two separately formed patterns, is formed on a single mask layer and then transferred to the underlying substrate by pitch multiplication and conventional photolithography.
Patent
Single spacer process for multiplying pitch by a factor greater than two and related intermediate IC structures
TL;DR: In this article, a single spacer process for multiplying pitch by a factor greater than two is provided, where tiers of stacked mandrels are formed over a substrate, each of the n tiers comprising a plurality of mandrees substantially parallel to one another.
Patent
Pitch reduced patterns relative to photolithography features
Luan Tran,William T. Rericha,John K. Lee,Ramakanth Alapati,Sheron Honarkhah,Shuang Meng,Puneet Sharma,Jingyi Bai,Zhiping Yin,Paul A. Morgan,Mirzafer K. Abatchev,Gurtej S. Sandhu,D. Mark Durcan +12 more
TL;DR: In this paper, pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to create the relatively large features of a second pattern, and the combined pattern is then transferred to the silicon oxide layer and then to an amorphous carbon mask layer.
Patent
Mask material conversion
TL;DR: In this article, a pattern of mandrels is first formed overlying a semiconductor substrate, and spacers are then formed on the sidewalls of the mandrel by depositing a blanket layer of material over the mandrells and preferentially removing spacer material from horizontal surfaces.
Patent
Multiple deposition for integration of spacers in pitch multiplication process
TL;DR: In this article, pitch multiplication is performed using a two-step process to deposit spacer material on mandrels, where the precursors of the first step react minimally with the mandrel, forming a barrier layer against chemical reactions for the deposition process of the second step, which uses pre-processors more reactive with the amorphous carbon.
References
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Patent
Very low dielectric constant plasma-enhanced CVD films
TL;DR: In this paper, a method for depositing nano-porous low dielectric constant films by reacting an oxidizable silicon containing compound or mixture comprising an oxidisable silicon component and a non-silicon component having thermally liable groups with nitrous oxide, oxygen, ozone, or other source of reactive oxygen in gas-phase plasmaenhanced reaction is presented.
Patent
Low power method of depositing a low k dielectric with organo silane
TL;DR: In this paper, a method and apparatus for depositing a low dielectric constant film by reaction of an organo silane compound and an oxidizing gas at a low RF power level from 20-200 W was presented.
Patent
Cvd nanoporous silica low dielectric constant films
TL;DR: In this paper, a method and apparatus for depositing nano-porous low dielectric constant films by reaction of a silicon hydride containing compound or mixture optionally having thermally labile organic groups with a peroxide compound on the surface of a substrate.
Patent
Process for treating exposed surfaces of a low dielectric constant carbon doped silicon oxide dielectric material to protect the material from damage
TL;DR: In this paper, a method for treating exposed surfaces of a low k carbon doped silicon oxide dielectric material in order to protect the low k-coated silicon oxide material from damage during removal of photoresist mask materials is described.
Patent
Deposition of silicon dioxide and silicon oxynitride films using azidosilane sources
TL;DR: In this paper, a low temperature chemical vapor deposition process comprising heating a substrate upon which deposition is desired to a temperature of from about 350° C. to about 700° C is described.
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