scispace - formally typeset
Patent

Method of manufacturing apertured aluminum oxide substrates

Reads0
Chats0
TLDR
In this article, a method for making an apertured aluminum oxide substrate by selectively masking a sapphire wafer, depositing aluminum oxide adjacent the wafer and the mask, and removing the aluminum oxide deposited adjacent the mask and the masks, whereby an aperture is formed in the aluminium oxide.
Abstract
A method for making an apertured aluminum oxide substrate by selectively masking a sapphire wafer, depositing aluminum oxide adjacent the wafer and the mask, and removing the aluminum oxide deposited adjacent the mask and the mask, whereby an aperture is formed in the aluminum oxide. A composite is thus formed of an insulating substrate of monocrystalline sapphire with an insulating epitaxial layer of aluminum oxide apposed thereto, the epitaxial layer having an aperture therein which may be filled with an island of epitaxial silicon.

read more

Citations
More filters
Patent

Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors

TL;DR: In this article, a planar SOI MOSFET including a strained channel region is formed on a first portion of the silicon layer, followed by a partially-depleted SOI (PD-SOI) layer.
Patent

Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit

TL;DR: In this article, the first and second active regions of a semiconductor chip are disposed by a resistor and a doped region between two terminals, and a strained channel transistor is formed in the second active region.
Patent

Strained-channel transistor and methods of manufacture

TL;DR: A semiconductor device includes a region of semiconductor material with first and second isolation trenches formed therein this paper, where the first isolation trench is lined with a first material having a low oxygen diffusion rate and is filled with an insulating material.
Patent

Strained channel complementary field-effect transistors and methods of manufacture

TL;DR: In this paper, a gate dielectric overlying a channel region is introduced, and a high-stress film can overlie the gate electrode and spacers, forming a gap adjacent the channel region.
Patent

Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors

TL;DR: In this article, a static memory element includes a first inverter having an input coupled to a left bit node and an output coupled to the right bit node, and a second inverter has an input coupling to the left right bit nodes.
References
More filters
Patent

Method of making semiconductor device

TL;DR: In this paper, the authors describe the construction of an EMI by forming on the surface of an ELECTRICAL INSULATING SUBSTRATE, a plurality of SPACED regions of a SEMICONDUCTOR MATERIAL.
Patent

Method of fabricating integrated circuit device structure with complementary elements utilizing selective thermal oxidation and selective epitaxial deposition

TL;DR: In this paper, a planar dielectrically isolated semiconductor device is fabricated by depositing a surface layer of dielectric material on a major surface of a monocrystalline substrate, removing portions of the layer to define annular channels.
Patent

Method of making mos transistors

TL;DR: In this paper, the threshold voltage of the P channel unit is controlled to be in the -1 to -1.5 volt range by causing accumulation of N type dopants in the surface layer of the semiconductor body prior to deposition of the aluminum oxide.
Patent

Semiconductor growth on dielectric substrates

TL;DR: In this article, a SiO 2 layer may first be deposited on the sapphire by the reaction of oxygen and silicon tetrachloride in the decomposition of ethyl orthosilicate.
Patent

Process for forming monocrystalline and poly

TL;DR: In this article, a method where an AMROPHOUS MATERIAL is initIally designated on a MONOCRYSTALLINE SUBSTRATE and where subsets of the AMORPHOUS LAYER are removed to expose PORTIONS of the surface of the monocrystalline substrate is presented.