Mission Profile based Reliability Analysis of a Three-Phase PV Inverter Considering the Influence of High dv/dt on Parasitic Filter Elements

TLDR: In this article, the effect of parasitic capacitances on the lifetime of the filter inductors in SiC power semiconductor devices in medium voltage (MV) applications has been analyzed.

Abstract: Silicon Carbide (SiC) power semiconductor devices in medium voltage (MV) applications have facilitated the use of power converters at distribution voltage level. In these applications, the semiconductor devices are exposed to a high peak stress (of up to 15 kV) and a very high dv/dt (of up to 100 kV/µs). The increasing use of these power devices has made the effects of the parasitic elements in the filter more prominent, due to the high dv/dt experienced by the passive filter elements during device switching transients. The parasitic elements in the filter inductors causes an increased switching loss in the devices. This paper analyses the effect of these additional losses on the lifetime of the device. A thermal analysis based on a mission profile (solar irradiance and temperature) is provided to account for the additional junction temperature rise due to the high dv/dt and the parasitic filter elements. Rainflow counting method has been used to identify the mean and amplitude of each thermal cycle. An analytical device model and Palgrem Miner rule is used to quantify the damage in the device. Comparisons have been carried out on basis of lifetime, for cases with and without the influence of parasitic capacitances. This analysis can be helpful in validating the importance of the design of filter inductors in these MV applications.