Proceedings ArticleDOI
Novel Vedic mathematics based ALU using application specific reversibility
Kunal Jadhav,Aditya Vibhute,Shyam Iyer,R. Dhanabal +3 more
- pp 1-5
TLDR
The proposed project introduces the concept of application specific reversibility wherein the logical states belonging only to a particular function of the module is being considered, which significantly impacts in reducing the area limitations of a reversible unit while keeping its power efficiency benefits.Abstract:
The proposed project utilizes the computational speed advantages of Vedic algorithm and energy optimization benefits of Reversible circuit. The Vedic algorithm optimizes the conventional mathematic computation logic used in the current processors thereby, effectively increasing the speed of computation. The Urdhva Triyambakam method derived from the ancient Indian mathematics will be used in the proposed project. Reversible circuits, on the other hand, reduces the power dissipation incurred due information/bits loss as in the case of an irreversible circuit making way for better power utilization along with reduced heat dissipation. The proposed project introduces the concept of application specific reversibility wherein the logical states belonging only to a particular function of the module is being considered, which significantly impacts in reducing the area limitations of a reversible unit while keeping its power efficiency benefits. The circuit design presented utilizes the above technique mentioned while designing the adder, multiplier along with other modules of an ALU.read more
Citations
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Book ChapterDOI
Power and Delay Efficient ALU Using Vedic Multiplier
TL;DR: In this article, the authors proposed an ALU design using Vedic algorithm and reversible logic to improve the speed and power consumption of the ALU. The proposed design yields 6.7% decrease in dynamic power and 2.2% reduction in the number of cells used.
Proceedings ArticleDOI
Design and implementation of high efficiency vedic binary multiplier circuit based on squaring circuits
TL;DR: A dedicated architecture is proposed in this paper which is exclusively used for multiplication of two numbers based on the Vedic sutras, which proves that the architecture prosed using Nikhilam sutra improves the efficiency considerably.
Proceedings ArticleDOI
Speed and Power Efficient Reversible Logic Based Vedic Multiplier
Ansiya Eshack,S. Krishnakumar +1 more
TL;DR: A system which employs Vedic multipliers and reversible gates to perform multiplications with increased throughput and using very little power is proposed.
Journal ArticleDOI
Study of mathematics through indian veda’s : A review
TL;DR: In this article , an array of growth and development in the field of Vedic mathematics with a special focus on the structure of VEDIC multipliers and Vedic algorithms like Urdhva Tiriyagbhyam and Nikhilam algorithms is discussed.
Proceedings ArticleDOI
Design of an efficient vedic binary squaring circuit
S Nithyashree,Y Chandu +1 more
TL;DR: A comparative study of the projected architecture and the prevailing multipliers, on the premise of delay and space utilization is presented and the simulation outcome proves that the design projected employing Nikhilam sutra improves the performance significantly.
References
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Journal ArticleDOI
Irreversibility and heat generation in the computing process
TL;DR: Two simple, but representative, models of bistable devices are subjected to a more detailed analysis of switching kinetics to yield the relationship between speed and energy dissipation, and to estimate the effects of errors induced by thermal fluctuations.
Journal Article
Reversible logic
W.D. Pan,M. Nalasani +1 more
TL;DR: The inputs and outputs of reversible logic gates can be uniquely retrievable from each other, which makes them very attractive for applications where extremely low power consumption, or heat dissipation, is desirable.
Proceedings ArticleDOI
Design of a Reversible ALU Based on Novel Programmable Reversible Logic Gate Structures
TL;DR: The design of two programmable reversible logic gate structures targeted at ALU implementation and their use in the realization of an efficient reversible ALU is demonstrated and its advantages over the only existing ALU design are quantitatively analyzed.
Posted Content
A New Reversible TSG Gate and Its Application For Designing Efficient Adder Circuits
TL;DR: It is demonstrated that the adder architectures designed using the proposed gate are much better and optimized, compared to their existing counterparts in literature; in terms of number of reversible gates and garbage outputs.
Introduction to Reversible Logic Gates & its Application
TL;DR: A basic reversible gate to build more complicated circuits which can be implemented in ALU, some sequential circuits as well as in some combinational circuits.