Journal ArticleDOI
Random Pattern Testability
TLDR
A new analytical method of computing the fault coverage that is fast compared with simulation is described that is possible to identify the ``random-pattern-resistant'' faults, modify the logic to make them easy to detect, and thus, increase the fault Coverage of the random test.Abstract:
A major problem in self testing with random inputs is verification of the test quality, i.e., the computation of the fault coverage. The brute-force approach of using full-fault simulation does not seem attractive because of the logic structure volume, and the CPU time encountered. A new approach is therefore necessary. This paper describes a new analytical method of computing the fault coverage that is fast compared with simulation. If the fault coverage falls below a certain threshold, it is possible to identify the ``random-pattern-resistant'' faults, modify the logic to make them easy to detect, and thus, increase the fault coverage of the random test.read more
Citations
More filters
Journal ArticleDOI
On Delay Fault Testing in Logic Circuits
Chin Jen Lin,Sudhakar M. Reddy +1 more
TL;DR: Algorithms, based on a five-valued logic system, to accurately calculate the detection probability of path delay faults by random delay tests as well as to derive deterministic tests to detect pathdelay faults are proposed.
Journal ArticleDOI
Power minimization in IC design: principles and applications
TL;DR: An in-depth survey of CAD methodologies and techniques for designing low power digital CMOS circuits and systems is presented and the many issues facing designers at architectural, logical, and physical levels of design abstraction are described.
Book
VLSI Test Principles and Architectures: Design for Testability (Systems on Silicon)
TL;DR: This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time- to-volume.
Journal ArticleDOI
On a new class of codes for identifying vertices in graphs
TL;DR: A new class of codes for the optimal covering of vertices in an undirected graph G such that any vertex in G can be uniquely identified by examining the vertices that cover it is investigated.
Journal ArticleDOI
Transition density: a new measure of activity in digital circuits
TL;DR: It is shown how the density values at internal nodes can be used to study circuit reliability by estimating theaverage power and ground currents; the average power dissipation; the susceptibility to electromigration failures; and the extent of hot-electron degradation.
References
More filters
Proceedings ArticleDOI
A logic design structure for LSI testability
TL;DR: A logic design method that will greatly simplify problems in testing, diagnostics, and field service for LSI is described, based on two concepts that are nearly independent but combine efficiently and effectively.
Journal ArticleDOI
Probabilistic Treatment of General Combinational Networks
K.P. Parker,Edward J. McCluskey +1 more
TL;DR: In this correspondence two methods are given for calculating the probability that the output of a general combinational network is 1 given the probabilities for each input being 1.