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Proceedings ArticleDOI

Side channel vulnerability metrics: the promise and the pitfalls

TLDR
The CSV metric is suggested, which tries to show how to overcome some of the shortcomings of the SVF metric, without completely changing its character.
Abstract
Side-channels enable attackers to break a cipher by exploiting observable information from the cipher program's execution to infer its secret key. While some defenses have been proposed to protect information leakage due to certain side channels, the effectiveness of these defenses have mostly been given only qualitative analysis by their authors. It is desirable to have a general quantitative method and metric to evaluate a system's vulnerability to side-channel attacks.In this paper, we define the features of a good side-channel leakage metric. We review a recently proposed metric called the Side-channel Vulnerability Factor (SVF) and discuss its merits and issues. We suggest the CSV metric, which tries to show how to overcome some of the shortcomings of the SVF metric, without completely changing its character. We use software cache side-channel attacks and defenses as an example to compare the metrics with known and measurable results on system leakiness.

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Citations
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Proceedings ArticleDOI

A high-resolution side-channel attack on last-level cache

TL;DR: New techniques to achieve high-resolution tracking of the victim accesses to enable attacks on ciphers where critical events have a small cache footprint and it is shown that this attack frequently obtains an equal quality channel.
Proceedings ArticleDOI

Understanding contention-based channels and using them for defense

TL;DR: A general mathematical study of microarchitectural channels using information theory and a novel way of detecting intelligent adversaries that try to hide while running covert channel eavesdropping attacks is introduced.
Proceedings ArticleDOI

How secure is your cache against side-channel attacks?

TL;DR: A novel probabilistic information flow graph is proposed to model the interaction between the victim program, the attacker program and the cache architecture, and a new metric, the Probability of Attack Success (PAS), is derived, which gives a quantitative measure for evaluating a cache’s resilience against a given class of cache side-channel attacks.
Journal ArticleDOI

An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools

TL;DR: An overview of hardware security and trust from the perspectives of threats, countermeasures, and design tools is presented to motivate hardware designers and electronic design automation tool developers to consider the new challenges and opportunities of incorporating an additional dimension of security into robust hardware design, testing, and verification.
Proceedings ArticleDOI

New models of cache architectures characterizing information leakage from cache side channels

TL;DR: This paper establishes side-channel leakage models based on the non-interference property, and defines how the security aspects of a cache architecture can be modeled as a finite-state machine (FSM) with state transitions that cause interference.
References
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Book ChapterDOI

Differential Power Analysis

TL;DR: In this paper, the authors examine specific methods for analyzing power consumption measurements to find secret keys from tamper resistant devices. And they also discuss approaches for building cryptosystems that can operate securely in existing hardware that leaks information.
Book ChapterDOI

Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems

TL;DR: By carefully measuring the amount of time required to perform private key operalions, attackers may be able to find fixed Diffie-Hellman exponents, factor RSA keys, and break other cryptosystems.
Book ChapterDOI

Differential Fault Analysis of Secret Key Cryptosystems

TL;DR: This work states that this attack is applicable only to public key cryptosystems such as RSA, and not to secret key algorithms such as the Data Encryption Standard (DES).
Posted Content

Cache attacks and Countermeasures: the Case of AES.

TL;DR: In this article, the authors describe side-channel attacks based on inter-process leakage through the state of the CPU's memory cache, which can be used for cryptanalysis of cryptographic primitives that employ data-dependent table lookups.