Journal ArticleDOI
The role of the metal-semiconductor interface in silicon integrated circuit technology
TLDR
In this article, the Schottky barrier diode has been characterized in terms of the height and thickness of the potential energy barrier arising from thermal equilibrium among charge carriers between dissimilar conductors.Abstract:
A typical medium-scale integrated (MSI) circuit requires hundreds of metal-semiconductor (M–S) junctions that are utilized for rectification, interconnection of device elements, and termination to external circuits. Comparison has been made between two metallization technologies, based upon the possible metallurgical reactions with Si: (1) nonreactive, such as evaporated aluminum, and (2) reactive, such as PtSi. Ohmic and rectifying contacts have been contrasted on the basis of the dominant current conduction mechanisms at the M–S interface. Current transport has been characterized in terms of the height and thickness of the potential energy barrier arising from thermal equilibrium among charge carriers between dissimilar conductors. Thermionic emission of electrons and holes provides the first illustration of conduction over a thick potential barrier (≫100 A), resulting in a rectifying contact (Schottky barrier diode). Thus, Schottky diode currents are exponentially dependent upon potential barrier height and inverse temperature. The contrasting illustration deals with a thin barrier (≪100 A) that conducts electrons and holes by quantum mechanical tunneling and forms ohmic contacts with resistance controlled only by contact size and underlying silicon resistivity. The final section covers two possible problems associated with silicon integrated circuit (SIC) fabrication. In the first example, a layer of oxide, too thin to be visible by optical interference (<500 A), can prevent proper contact formation. A method of observation, which makes use of hydrostatic surface tension, has been presented with experimental results on SiO2 films. Successive etching has revealed a detection limit of 11–13 A. The second deleterious phenomenon to be treated is the electrical degradation of Schottky barrier rectification associated with nonplanar penetration of metals into silicon. The destruction of the planar M–S interface could result from either undesired alloy eutectics or metallic precipitation.read more
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Fundamentals of Modern VLSI Devices
Yuan Taur,Tak H. Ning +1 more
TL;DR: In this article, the authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices.
Journal ArticleDOI
First phase nucleation in silicon–transition‐metal planar interfaces
R. M. Walser,R. W. Bené +1 more
TL;DR: In this article, the first compound nucleated in planar binary reaction couples is the most stable congruently melting compound adjacent to the lowest temperature eutectic on the bulk equilibrium phase diagram.
Journal ArticleDOI
Low Schottky barrier of rare‐earth silicide on n‐Si
TL;DR: In this paper, a passivation coating of W, or Pt, or both was used to prevent the rare earth from oxidation and Schottky-barrier heights of about 0.4 eV on n-Si and 0.7eV on p-Si were determined.
Journal ArticleDOI
Parallel silicide contacts
I. Ohdomari,King-Ning Tu +1 more
TL;DR: Parallel silicide contacts consisting of PtSi and NiSi with fixed ratios of contact areas were prepared for currentvoltage and capacitancevoltage measurements of Schottky barrier height as discussed by the authors.
Journal ArticleDOI
A study of the leakage mechanisms of silicided n+/p junctions
TL;DR: In this article, the authors investigated leakage mechanisms for shallow, silicided, n+/p junctions and identified two mechanisms for junction leakage: generation centers in the depletion region caused by deep levels from damage, or from impurities, and Fowler-Nordheim tunneling caused by irregularities at the silicide/silicon interface at high reverse bias.