scispace - formally typeset
Open AccessBook

Vlsi Digital Signal Processing Systems: Design And Implementation

Reads0
Chats0
TLDR
This book discusses Digital Signal Processing Systems, Pipelining and Parallel Processing, Synchronous, Wave, and Asynchronous Pipelines, and Bit-Level Arithmetic Architectures.
Abstract
Introduction to Digital Signal Processing Systems. Iteration Bound. Pipelining and Parallel Processing. Retiming. Unfolding. Folding. Systolic Architecture Design. Fast Convolution. Algorithmic Strength Reduction in Filters and Transforms. Pipelined and Parallel Recursive and Adaptive Filters. Scaling and Roundoff Noise. Digital Lattice Filter Structures. Bit-Level Arithmetic Architectures. Redundant Arithmetic. Numerical Strength Reduction. Synchronous, Wave, and Asynchronous Pipelines. Low-Power Design. Programmable Digital Signal Processors. Appendices. Index.

read more

Content maybe subject to copyright    Report

Citations
More filters
Proceedings ArticleDOI

Rapid prototyping of orthonormal wavelet transforms on FPGAs

TL;DR: The approach takes advantage of the similarities between the forward and inverse wavelet transform structures to achieve an efficient and suitable partitioning and has been verified on the Xilinx 4000 FPGA series.
Proceedings Article

Deriving stencil hardware accelerators from a single higher-order function

TL;DR: Using this methodology, efficient FPGA hardware is derived achieving good performance and several applications have been implemented to show the general applicability of the design methodology.
Dissertation

Design of 2D discrete cosine transform using CORDIC architectures in VHDL

SriKrishna J
TL;DR: Results prove that AR Cordic algorithm is better than Chen’s algorithm, even the new scaling less CORDIC algorithm, which is multiplier dependant algorithm for high speed DCT.
Proceedings ArticleDOI

Design and FPGA implementation of orthonormal inverse discrete wavelet transforms

TL;DR: A novel bit-serial structure dedicated to inverse discrete wavelet transforms based on time-interleaved FIR filters is presented, which is modular and scalable, which allows a bit-level parameterisation.
References
More filters
Journal ArticleDOI

VLSI Array processors

Sun-Yuan Kung
- 01 Jan 1985 - 
TL;DR: A general overview of VLSI array processors and a unified treatment from algorithm, architecture, and application perspectives is provided in this article, where a broad range of application domains including digital filtering, spectrum estimation, adaptive array processing, image/vision processing, and seismic and tomographic signal processing.
ReportDOI

VLSI Array Processor

Ed Greenwood
TL;DR: Detailed design of the Arithmetic Processor Unit (APU) chip has been completed and all cell types have been run through the design rule check (DRC) programs, corrected and verified.
Book

VLSI Synthesis of DSP Kernels: Algorithmic and Architectural Transformations

TL;DR: This paper presents a framework for Algorithmic and Architectural Transformations for Multiplication-Free Linear Transforms and some examples of how this framework has been applied to DSP implementation.