Showing papers on "Barrier layer published in 1990"

Theory of Steady‐State Passive Films

Abstract: A theory is developed for the steady-state properties of passive films that form on metals and alloys in aqueous environments. This theory is based on the point defect model developed earlier, and predicts that they steady-state thickness of the barrier film and the log of the steady-state current will vary linearly with applied voltage. These relationships may be used to estimate empirical parameters that describe the dependencies of the potential drop across the barrier film/environment interface on the applied voltage and pH and to estimate kinetic parameters for dissolution of the film. If dissolution at the film-solution interface occurs very slowly, the primary passive film is envisaged to consist of a rigid oxide sublattice that transmit cations from the metal to a gel-like, precipitated upper layer. If dissolution at the barrier film/environment interface occurs rapidly, then a steady-state thickness is achieved by a balance between the rate of dissolution of the film at the film-solution interface and the rate of growth of the film into the underlying metal phase. Due to the outward movement of oxygen vacancies (i.e., inward movement of oxygen ions) through the barrier layer. The model is found to account for many experimental data that have beenmore » published in the literature on the quasi steady-state properties of passive films.« less

Machine dishwashing detergent tablets

Abstract: A multilayer detergent tablet containing an outer layer, a barrier layer and an inner layer. The tablet releases sequentially ingredients contained in the outer layer and ingredients contained in the inner layer. The time interval between the release of the outer layer ingredients and the release of the inner layer ingredients is controlled by the particular choice of an ingredient for the barrier layer and the relative thicknesses of the inner layer, the barrier layer and the outer layer. The tablet is able to separate in time the dissolution of incompatible ingredients such as an enzyme and a chlorine bleach. The tablet also provides sequential release of a dishwashing composition and a rinse aid composition such that cleaning is accomplished prior to the release of the rinse aid.

Process for metallizing integrated circuits with electrolytically-deposited copper

Abstract: A masked, conformal electrodeposition process for copper metallization of integrated circuits. The process is considerably less complex than other metallization processes utilizing electrodeposition, and provides excellent step coverage for sub-micron contact openings. Full-step coverage has been obtained with the process for contact openings as small as 0.5 microns in diameter. The process begins with the blanket sputter or LPCVD deposition of a thin conductive barrier layer of a material such as titanium nitride, titanium-tungsten or nitrided titanium-tungsten. A photoresist reverse image of the maskwork that normally would be used to etch the metallization pattern on the circuitry is created on the wafer on top of the barrier layer. As an option, the reverse image of the desired metallization pattern may be created by etching a dielectric material layer such as silicon dioxide or silicon nitride, using a photoresist reverse image as a template. The wafer is then transferred to an electrolytic bath, preferably with a pH of 13.5, in which copper is complexed with EDTA molecules. Metallic copper is deposited on the barrier layer where it is not covered by photoresist. At current densities of less than 1 milliamp/cm 2 , the process will automatically fill contact/via openings to a uniform thickness which is independent of the depth of the opening. Following electrodeposition of the metallization layer to the desired thickness, the wafer is removed from the bath, and the photoresist or dielectric material reverse-pattern mask is stripped. At this point, an optional corrosion-resistant metal layer may be galvanically plated on the surface of the copper layer. Finally, portions of the barrier layer that were exposed by removal of the resist are then removed with either a wet or a dry etch.

Aluminum bump, reworkable bump, and titanium nitride structure for tab bonding

Abstract: A semiconductor chip carrying integrated circuits has lead lines terminating in conductive terminal pads exposed to the exterior through openings in a passivation layer. The pads include pedestals or bumps extending up from them. Each of the pedestals includes a thin metallic adhesion layer deposited on the pad. A thick metallic layer of aluminum or an alloy of aluminum is deposited upon said thin metallic adhesion layer. The thick metallic layer includes at least one metal selected from the group consisting of aluminum, aluminum plus a small percentage of Cu, Ni, Si, or Fe. Several other alternative metals can be added to aluminum to form an alloy. The thick metallic layer forms the bulk of the height of the pedestal. An adhesion layer is deposited on the bump of aluminum composed of a thin film of titanium or chromium. A barrier layer is deposited on the adhesion layer composed of copper, nickel, platinum, palladium or cobalt. A noble metal consisting of gold, palladium, or platinum is deposited on the barrier layer. In a variation of the top surface, a thick cap of a reworkable bonding metal is deposited above the metallic bump as the top surface of said bump. The bump can be composed of a number of metals such as gold, copper, nickel and aluminum in this case with aluminum being preferred. In place of the adhesion and barrier metals one can employ a layer of titanium nitride deposited on said thick layer of metal.

Integrated circuit copper metallization process using a lift-off seed layer and a thick-plated conductor layer

Abstract: An improved metallized structure (10) is formed from a copper seed layer (46) and a copper structure (48). Semiconductor devices to be connected (16-18) are covered by a conductive barrier layer (20). An oxide layer (28) is then deposited over the barrier layer (20) and patterned using standard photolithographic techniques and an anisotropic plasma etch. Vertical sidewalls (36-38) are formed by the etch and an HF deglaze. A seed layer (44-46) is then sputtered onto a photoresist layer (30) and the exposed barrier layer (20). After stripping the photoresist (30) and the seed layer (44) thereon, the copper structure (48) is electroplated over the remaining seed layer (46). The structure (48) thus formed has approximately vertical sidewalls (24-26) for improved contact with subsequent layers.

Organic electroluminescent element

Abstract: PURPOSE:To obtain the subject element emitting light having high luminance in high efficiency even at low voltage and easily producible at a low cost by using a perylene derivative as a light-emitting layer of an element having a transparent electrode as at least one of the electrodes CONSTITUTION:The objective element is produced by using a perylene derivative having a peak fluorescence wavelength of 400-800nm is used in a light-emitting element having a hole injection transfer layer, a light-emitting layer, a hole barrier layer and a cathode laminated in the order on an anode, wherein at least one of the electrodes is transparent Examples of the perylene derivative are compounds of formulas I and II (R an R are 1-18C alkyl, 5-18C cycloalkyl, etc; X to X are H, Cl, etc; Y to Y are halogen, cyano, etc)

Gate adjusted resonant tunnel diode device and method of manufacture

Abstract: A gated resonant tunneling diode has a semiconductor mesa formed on a semiconductor substrate, a tunneling barrier layer between the mesa and the substrate, and a gate layered over the substrate about the mesa and aligned in close proximity to the tunneling barrier layer. A control voltage on the gate laterally constricts a potential well in the tunneling barrier to control the electrical size of a channel within which tunnelling occurs across the tunneling barrier layer. Preferably the gate and the tunneling layer are disposed at the base of the mesa, and the gate makes a rectifying Schottky junction in connection with the tunneling barrier layer. The device is constructed using an anisotropic etch to form the mesa with an undercut wall and a top portion overhanging the undercut wall, and a nonconformal deposition of gate material to align the gate with the top portion of the mesa.

Photographic support material comprising an antistatic layer and a barrier layer

Abstract: Photographic support materials are comprised of a conventional support, such as polyester film, cellulose acetate film or resin-coated paper, having thereon an antistatic layer comprising vanadium pentoxide and an overlying barrier layer comprised of a latex polymer having hydrophilic functionality. The barrier layer provides excellent adhesion between the antistatic layer and overlying layers, such as silver halide emulsion layers or curl control layers, and also prevents unwanted diffusion of the vanadium pentoxide; whereby the combination of antistatic and barrier layers serves to impart a high level of permanent antistatic protection.

Current-Voltage Characteristics of YBa2Cu3Oy/La0.7Ca0.3MnOz/YBa2Cu3OyTrilayered-Type Junctions

Abstract: YBa2Cu3Oy(superconductor)/La0.7Ca0.3MnOz(magnetic material)/YBa2Cu3Oy(superconductor) trilayered-type junctions were prepared on MgO(100) single-crystal substrates, and the current-voltage characteristics were examined. The top and bottom YBa2Cu3Oy layers were 200 nm thick, and the La0.7Ca0.3MnOz layer was 20, 30, 50 or 100 nm thick. A supercurrent was observed through all the La0.7Ca0.3MnOz layers, even the thickest one. Further investigation showed that a supercurrent could he observed through the 500-nm barrier layer.

Investigation of anodic aluminium oxide layers by electrochemical impedance spectroscopy

Abstract: The effects of ac-electrochemical graining and anodizing of an aluminium substrate on the layer properties of both barrier and porous alumina layers are examined using electrochemical impedance spectroscopy (EIS) In order to show the capabilities of the technique for a quantitative determination, results based on impedance data are compared with complementary information from surface analytical techniques Though the results for the determination of barrier layer thickness and dielectric constant look promising, calculations are troubled by non-trivial dispersion phenomena This problem is treated using a fractal description of surface roughness of the substrate and of the layer thicknesses Information on pore structure of porous oxide films could not be obtained from the approach considered in this study

Tungsten deposition process for low contact resistivity to silicon

Abstract: In a method of forming a barrier layer for contacting a metal interconnect layer to one or more exposed N and p type silicon regions on a wafer, the wafer is heated with a direct radiation source, such as a lamp. To equalize the differing emissivities of the N type and P type silicon regions, an opaque layer of refractory metal is first formed on the regions at a temperature below approximately 100°C. A refractory metal deposition process is then conducted at temperatures between 230°C-425°C. During this higher temperature deposition process, the reducing gas is ramped up with time to increase the deposition rate of the refractory metal as the exothermic reducing reactions increasingly heat the contact areas. Other process and apparatus features enable higher bonding strength between the silicon surface and the formed barrier layer contacting the silicon surface and enable a higher purity content of the processing gases as well as improved diffusion of processing gases when injected into the processing chamber.

Method of fabricating highly lattice mismatched quantum well structures

Abstract: A method of fabricating a semiconductor heterostructure includes the growth of a quantum well active region that is highly lattice-mismatched relative to a substrate. A buffer layer having a thickness above a critical value is grown on the substrate whereby the stress due to a lattice constant mismatch between the buffer layer and substrate is relieved through the formation of misfit dislocations. A strained superlattice structure is grown on the buffer layer in order to terminate any upwardly-propagating dislocations. An unstrained barrier layer is subsequently grown on the superlattice structure. The fabrication method concludes with the growth of a quantum well structure on the unstrained layer wherein a lattice constant mismatch between the quantum well structure and the unstrained barrier layer is smaller than the lattice constant mismatch between the quantum well structure and the substrate. As a result, only a fraction of the stress due to the large lattice mismatch between the quantum well structure and the substrate is accommodated by coherent strain in the quantum well structure, while the remainder of the stress is relieved through the formation of misfit dislocations spatially separated from the quantum well structure.

High value tantalum oxide capacitor

Abstract: A thin film capacitor for use in an integrated circuit includes a lower plate disposed on the silicon substrate of the integrated circuit. The lower plate comprises a barrier layer of conductive material which prevents transport of silicon from the silicon substrate into a layer of dielectric material which is disposed between the lower plate and an upper plate. A portion of the barrier layer can be consumed and transferred into dielectric material by, for example, high temperature oxidation which generates a symmetric series capacitor with the dielectric layer. A layer comprising an oxide of the barrier layer material is formed between the barrier layer and the dielectric layer by consuming an upper portion of the barrier layer. The capacitor is constructed by forming the barrier layer on at least a portion of the silicon substrate, forming the dielectric layer over an upper surface of the barrier layer, oxidizing the upper surface of the barrier layer and forming a layer of electrically conductive material on an upper surface of the dielectric layer.

New Electrorelease Systems Based on Microporous Membranes

Abstract: : Electrorelease systems have previously been based on electrochemical release of molecules chemically entrapped in polymer membranes. A new type of electrorelease system is described; this system is based on a microporous Al sub 2 0 sub 3 membrane covered with a barrier layer which seals the pores. Electrorelease occurs upon electrochemical dissolution or disruption of the barrier layer, which opens the pores. Two different barrier layers are investigated: silver and Na(+)-form Nafion. The electrorelease rate can be controlled by partially removing the barrier layer or by dividing the barrier layer into several individually-addressable zones. This configuration may also be used as a multi-dose device. Keywords: Drug release, Insulin release.

Multilayer light scattering photovoltaic back reflector and method of making same

Abstract: A multilayered, light-scattering back reflector for a photovoltaic device, said back reflector including a first relatively hard, textured layer atop a substrate and a second highly reflective layer conformally disposed atop the first layer. The back reflector may further include a third light scattering layer formed atop said second layer, said third layer adapted to further provide a barrier layer between the body of semiconductor material from which the photovoltaic device is formed and the multilayered back reflector.

Process for forming a color filter

Abstract: A filter is formed on a substrate, such as a solid state imager, by providing successively on the substrate a layer of an absorber material, a layer of a barrier material, and a layer of a photoresist material. The photoresist is patternwise exposed and developed, thereby baring regions of the barrier layer underlying selected regions of the photoresist layer. The coated substrate is reactive ion etched under a first set of etching conditions to etch away the bared regions of the barrier layer and to bare but not substantially etch the underlying regions of the absorber layer, and then reactive ion etched under a second set of etching conditions, thereby etching away the remaining regions of the photoresist layer and the bared regions of the absorber layer, so forming a filter on the substrate. To form multi-colored filters, the process may be repeated with a different dye, or additional dyes may be deposited by other processes, such as that described in U.S. Pat. No. 4,808,501.

Integral multilayer analytical element for analysis of ammonia-forming substrate

Abstract: An integral multilayer analytical element for the analysis of an ammonia-forming substrate comprising: (I) a light-transmissive, liquid-impermeable support: (II) an ammonia indicator layer containing a reagent capable of undergoing a detectable change by gaseous ammonia; (III) a liquid barrier layer which allows gaseous ammonia passing therethrough; (IV) an ammonia-forming substrate reaction layer containing a reagent capable of reacting with an ammonia-forming substrate to form gaseous ammonia; (V) an intrinsic ammonia trapping layer containing a reagent which acts on intrinsic ammonia to convert it into a form which can not reach said reaction layer; and (IV) a porous spreading layer, in a laminate form.

Temperature Dependence of Electron Mobility in InGaAs/InAlAs Heterostructures

Abstract: Temperature dependence of the electron mobility in modulation-doped InGaAs/InAlAs single heterostructures has been investigated by Hall effect measurements in the temperature range from 15 K to 300 K in order to clarify the scattering mechanisms of the electrons. Two kinds of samples are used with doping densities in the InAlAs barrier layer, ND=3×1017 cm-3 and 1×1018 cm-3. The measured electron mobility is compared with the calculated values by taking into account the scattering by InAs-like and GaAs-like LO phonons in the InGaAs channel layer, in addition to the acoustic deformation potential, piezoelectric, ionized impurity, alloy disorder and interface roughness scatterings. The calculated electron mobility shows a good agreement with the experimental data when the alloy disorder potential is assumed to be about 0.7 eV.

Semiconductor light emitting element

Abstract: PURPOSE:To separate an impurity doped layer form a light emitting layer completely in space and to make it possible to perform a high speed response by doping with an impurity one atomic layer of a barrier layer having a multiple quantum well structure. CONSTITUTION:The following layers are sequentially laminated on an n-type InP substrate 11: an n-type InP clad layer 12; an active layer 13 which undergoes planar doping of Zn and has a multiple quantum well structure of InP/InPGaAsP; a p-type InP clad layer 14; and a p-type InGaAsP contact layer 15. As for a growing method, a multiple growth chamber method and a hydride vapor growth method are used. The supply of InCl is stopped during the growth of a nondoped InP layer which is a barrier layer in the multiple quantum well structure. PH3 and dimethyl zinc are supplied. The growing temperature is 600 deg.C. A circular groove 16 through the active layer 13 is formed, and current constriction is performed. A Zn planar doping layer 22 is formed in an InP barrier layer 21 in the active layer 13. The thickness of the barrier layer is 200Angstrom . The thickness of an InGaAsP well layer 23 is 100Angstrom . The fifteen layers are laminated. Since Zn is hardly diffused into the InGaAsP well layer, both the rise-up time the fall-down time of the light outputs are shortened to a large extent.

Large peak current densities in novel resonant interband tunneling heterostructures

Abstract: We have observed negative differential resistance (NDR) and large peak current densities in a novel resonant interband tunneling structure grown by molecular beam epitaxy in the InAs/GaSb/AlSb material system. The structure consists of a thin AlSb barrier layer displaced from an InAs(n)/GaSp(p) interface. NDR is readily observable at room temperature with peak current densities greater than 105 A/cm2. The enhancement in peak current density relative to a structure with no AlSb barrier is consistent with the existence of a quasi‐bound state in the region between the barrier and the InAs/GaAs interface. Furthermore, we demonstrate that by growing the AlSb layer on either the InAs or GaSb side of the interface, the quasi‐bound state can be localized in either material.

Coupled quantum well strained superlattice structure and optically bistable semiconductor laser incorporating the same

Abstract: A short-period, strained superlattice structure (10) includes two coupled quantum well layers (12,14) separated by a barrier layer (16). The quantum well layers are preferably formed of indium arsenide and are 2 monolayers thick. The barrier layer is preferably formed of gallium arsenide and is 2 to 10 monolayers thick. The quantum well layers have a lattice parameter or constant which is sufficiently different from that of the barrier layer that a permanent strain exists in the structure. The layers are sufficient­ly thin that they remain in an unrelaxed state, thereby precluding the formation of misfit dislocations. As an alternative, the superlattice structure may include more than two quantum well layers, each adjacent two of which are separated by a barrier layer. As another alternative, a plurality of structures, each including two quantum well layers separated by a barrier layer may be provided, with each structure separated by a gallium arsenide buffer layer on the order of 170 to 204 angstroms thick. Where incor­porated into a semiconductor diode laser as an active region, the strained superlattice structure is capable of exhibiting optical bistability.

Electrical contact with diffusion barrier

Abstract: A device is provided by forming a diffusion barrier at the interface between a metalized contact and the surface of a semiconductor substrate. A three-layer sandwich is formed over the contact region and then annealed in free nitrogen. The sandwich is made of a titanium nitride layer interposed between layers of titanium. During the anneal, material from the titanium layer adjacent to the substrate migrates thereinto to produce a highly conductive diffusion region of titanium silicide. Concurrently during the anneal the other layer of titanium, which is exposed to the nitrogen atmosphere, is converted into a backing layer of titanium nitride which enhances the barrier effect of the titanium nitride layer at the center of the sandwich structure. The conversion of titanium to titanium nitride causes a physical expansion in the layer involved. This serves to enhance the thickness of the barrier layer at all locations, but of particular significance at the corners of the contact well. A diffusion region of controlled depth and the deposition of minimal amounts of titanium remote from the contact side itself are advantageous results of the disclosed process.

Packaging material of laminate type

Abstract: A flexible, laminated material (10) for reforming into packages for contents of the type such as oxygen- and flavor-sensitive liquid foods, for example fruit juices. The material displays a carrier layer (11) of paper or paperboard and a preferably extruded layer (13) applied to one face of the carrier layer (corresponding to the inside of the finished package), this layer consisting of a mixture of polyethylene and ethylene vinyl alcohol copolymer. Since the barrier layer (13) thus includes both a polar (the ethylene vinyl alcohol copolymer) and a non-polar (polyethylene) component, the material possesses barrier properties against both polar and non-polar flavor components, at the same time as the material moreover displays tightness properties vis-a-vis oxygen.

Process of making titanium nitride barrier layer

Abstract: Two methods for substantially improving the integrity of a TiN barrier layer are disclosed. The first method allows an atmospheric anneal in a conventional semiconductor furnace. The atmospheric anneal substantially seals the exposed TiN surface preventing subsequent metal layers from migrating through the barrier layer. The second method involves a reaction within a plasma reactor using a plasma gas. The plasma gas reacts with titanium within the TiN film to form a desired titanium compound. The gas is adsorbed onto the TiN grains at the grain boundaries within the TiN film thus filling the grain boundaries and thus substantially preventing subsequent metal layers from migrating though the TiN barrier layer. The second method allows the deposition of TiN, the plasma reaction, and subsequent metal depositions to take place on the same equipment using the same evacuation cycle.

Doped titanate glass-ceramic for grain boundary barrier layer capacitors

Abstract: A high dielectric constant glass-ceramic material comprising small conducting grains based on BaTiO3 and/or SrTiO3 on the order of about 0.5-10.0 μm surrounded by a thin microcrystalline insulating barrier layer at the grain boundary about 0.01-0.10 μm thick wherein the conductivity of the grains is enhanced by addition of about 0.1-4.0 mol % of a dopant selected from among Group V elements, Ge and Si substantially incorporated in the bulk lattice of the grains upon Ti sites. A novel process for forming the glass-ceramic material is also disclosed.

Printing plate precursors

Abstract: A printing plate precursor comprises a substrate coated with a radiation sensitive composition overcoated with a barrier layer to prevent oxygen inhibiting photopolymerization of the composition. The barrier layer comprises a polymer and an amphoteric compound.

Oriented multilayer film and process for making same

Abstract: An oriented multilayer film comprising a barrier layer, a first layer on one side of said barrier layer and a second layer on the opposite side of said barrier layer is provided for use in food packaging applications. The first and second layers have melting points of at least about 115° C. The barrier layer comprises amorphous nylon having a glass transition temperature greater than the higher of the two melting points or higher than the melting point of the first and second layers. The barrier layer is substantially impermeable to oxygen, while the first and second layers may comprise certain polyethylene resins. The oxygen barrier properties of the film do not deteriorate as the barrier layer gradually absorbs moisture. A process for making such multilayer films is also provided.

Semiconductor laser device having plurality of layers for emitting lights of different wavelengths and method of driving the same

Abstract: A semiconductor laser device capable of emitting lights of different wavelengths has a substrate, a first light-emitting layer provided on the substrate, and a second light-emitting layer provided on the substrate and having a greater band gap than the first light-emitting layer. A barrier layer is disposed between the first and second light-emitting layers. The barrier layer has a band gap greater than those of the first and second light-emitting layers. The band gap and the thickness of the barrier layer are determined to be large enough to create, in response to injection of carriers to the light-emititng layers, a state in which the carrier density in the second light-emitting layer is made higher while the carrier density in the first light-emitting layer is made lower than those which would be obtained when the barrier layer is omitted. The device further has a pair of cladding layers sandwiching therebetween the first light-emitting layer, the barrier layer and the second light-emitting layer, the cladding layers having smaller refractive index values than the first and second light-emitting layers. The device further has electrodes for supplying electrical currents to the first and second light-emitting layers.

Heterojunction field effect transistor with monolayers in channel region

Abstract: A heterojunction field effect transistor (HFET) having a source, drain, and channel, wherein the channel comprises a quantum well and at least one mono-atomic well or barrier layer is provided. The mono-atomic well or barrier layer has a different bandgap than the channel region and serves to modify electron wave function and conduction band energy in the channel region. Preferably, an indium arsenide well monolayer is formed in an InGaAs channel region and functions to move a first quantized energy level E 0 closer to the bottom of the channel region quantum well thereby increasing electron concentration by increasing effective band offset potential. Another embodiment uses an aluminum arsenide monolayer as a barrier monolayer in the InGaAs channel. By varying location of the monolayers, confinement of electrons in the channel can be improved.