Showing papers on "Biasing published in 1989"

Phase-coherent control of photocurrent directionality in semiconductors.

Abstract: We demonstrate that one can generate and control photocurrents in semiconductors, without bias voltage, through multiple-frequency phase-coherent laser excitation of donors.

Power rectifier with trenches

Abstract: A semiconductor power rectifier attains low forward voltage drop, low reverse leakage current and improved switching speed by utilizing Schottky contact regions in a p-i-n rectifier along with other means for reducing the required forward bias voltage. In a preferred embodiment, the other means for reducing the required forward bias voltage includes a respective trench between each respective pair of successively spaced current interruption means.

Classical phase diffusion in small hysteretic Josephson junctions

Abstract: The existence of classical phase diffusion in hysteretic junctions is demonstrated by quantitative agreement between experimental and simulated {ital I}-{ital V} curves. The simulations are based on a circuit that accurately models both the junction and its external shunting impedance at microwave frequencies. We show that the bias current at which the junction switches from the phase diffusion state to the voltage state is sensitive to dissipation at microwave frequencies.

Sputtering process and an apparatus for carrying out the same

Abstract: A sputtering process of a substrate biasing system and an apparatus for carrying out the same, capable of forming a film in satisfactory surface coverage over stepped underlying layer. The present invention solves problems in the quality of films formed by the conventional sputtering process of a substrate biasing system by regulating the bias potential of a substrate on which a film is to be formed so that the kinetic energy of ions of a sputtering gas falling on the substrate is varied periodically. The bias potential is regulated by periodically varying the amplitude of the output of a radio frequency (or dc) bias power supply or by changing the duty factor of a voltage pulse stream of the output of the radio frequency (or dc) bias power supply.

Unshielded MR elements with patterned exchange-biasing

Abstract: The concept of patterned longitudinal biasing as a means to suppress Barkhausen noise in narrow-track MR (magnetoresistive) elements without under permeability degradation of the read region is discussed. This scheme also renders the performance of the read region relatively insensitive to the exact magnitude of the externally applied longitudinal bias, as long as this bias is large enough to ensure good longitudinal alignment of magnetization at the tail regions. This concept was demonstrated with Permalloy MR elements using patterned exchange biasing. Results show that these elements do indeed exhibit quiet and stable responses, but without the severe sensitivity reduction which is characteristic of MR elements under normal strong uniform longitudinal biasing. >

Spherical shell model of an asymmetric rf discharge

Abstract: A spherical shell model is used to study ion transport and bias voltage formation in asymmetric, capacitive rf discharges, which have unequal areas A and glow‐to‐electrode voltages V at the powered (a) and grounded (b) electrodes. Ions are generated by thermal electron ionization and are lost by ambipolar diffusion in the glow. Resonant charge transfer with a constant cross section is assumed to dominate the ion transport. We obtain the density ratio scaling na/nb∝(Ab/Aa )7/24, where n is the density at the glow‐sheath edge. Three electrode sheath models are considered: collisionless ions, collisional (constant mobility) ions, and a constant‐ion cross‐section collisional law. Using these and the continuity of the rf current flow, we obtain the scaling of the electrode voltage ratio with the electrode area ratio: Va/Vb∝(Ab/Aa )q. For typical rf materials processing discharges, the constant cross section law yields q≊2.21. The effects of secondary electron ionization and local ionization near the sheaths due to stochastic heating are shown to further reduce the value of q.

Noise reduction output buffer

Abstract: A circuit for compensating for MOS device response to supply voltage variations, as well as temperature and process variations, in an integrated circuit device. The compensation circuit produces a reference voltage which modulates the gate bias voltage of a MOS transistor such that the gate-to-source bias of the MOS transistor is varied to compensate for variations in the supply voltage as well as for variations in the temperature and manufacturing process. The circuit pulls up the reference voltage toward the supply voltage as the supply increases, thereby increasing the gate drive on the MOS transistor. The circuit provides compensation for both AC and DC supply variations. The MOS transistor is used to modulate the available current sinking capability in an IC device output buffer, such that as the MOS gate drive increases, the current sinking capability is reduced, thereby slowing the output state transitions as the supply increases, and reducing noise caused by supply variations.

Substrate bias potential generator of a semiconductor integrated circuit device and a generating method therefor

Abstract: A substrate bias potential generator for biasing a semiconductor substrate to a predetermined potential includes first and second substrate bias generating circuits which operate alternatively according to the potential of the substrate, whereby consumption of power in the substrate bias potential generator is reduced. The alternative operation of the bias generating circuits each activated by a pulse signal train is performed by using a first insulated gate transistor having a gate electrode connected to the semiconductor substrate, a second insulated gate transistor having a gate electrode for receiving the reference potential, an amplifier for differentially amplifying outputs of the first and second insulated gate transistors, an insulated gate transistor for charging an output of the amplifier to a predetermined potential when the amplifier is activated, and a circuit for transmitting the output of the differential amplifier to the first and second bias potential generating circuits. The differential amplifier is activated in response to an activation signal of a pulse train whereby an activation signal corresponding to the pulse train is transmitted to either substrate bias potential generating circuit.

Self regulating temperature heater as an integral part of a printed circuit board

Abstract: A heater (20,40,50,70,80) is secured to or embedded in a circuit board (10,30,75,86) and is selectively energizable by current to melt solder in a connection or disconnection operation The heater is spaced from circuit board contact pads (13,34) by circuit board structure material that transmits the generated thermal energy to the contact pads to melt solder or other fusible material The heater is a self-regulating heater in the form of a copper substrate having a thin surface layer of magnetically permeable, high resistance material An alternating current of constant amplitude and high frequency is passed through the heater and concentrated in the surface layer at temperatures below the surface layer Curie temperature At higher temperatures the current is distributed through the lower resistance substrate to limit further heating A current return path (21,43,53,73,85) or bus is disposed in closely-spaced parallel relation to the surface layer and establishes an electric field between the substrate and the return bus to bias current in the substrate toward the surface layer The return bus may be embedded in the circuit board or provided as part of external tooling employed to deliver energizing current

A double-sided silicon strip detector with capacitive readout and a new method of integrated bias coupling

Abstract: A novel biasing concept made it possible to implement capacitive coupling in a double-sided silicon strip detector system with a relatively simple production process. Capacitive coupling eliminates the problem of electronic readout saturation caused by leaky strips. This advantage is of particular value for the n-side, where a current caused by differences in the input voltage levels of the readout electronics could make any measurements impossible. Double-sided readout increases the position information and is advantageous for use in detector systems where compactness and minimization of scattering material are important. Static measurements have confirmed all the principal performance properties of the device. Further tests were performed in the readout electronics environment of the ALEPH minivertex detector under laboratory and operating conditions in a test beam at the CERN SPS and have confirmed the detector's performance. >

Non-volatile semi-conductor memory device with double gate structure

Abstract: A memory cell structure for a non-volatile semiconductor memory has a semiconductor substrate and first and second diffusion layers having a conductivity type opposite to that of the substrate, formed on the substrate and serve as a source and a drain. The second diffusion layer is coupled through a contact hole to a conductive layer that serves as a bit line. The functions of the first and second diffusion layers as the source and drain are reversed between data write and read modes. A floating gate and a control gate are insulatively provided on the substrate in parallel to each other. In either the data write mode or data read mode, the first and second diffusion layer are applied with a bias voltage while the control gate is initially applied with a ground voltage. A memory cell is selected by dropping the bias voltage on the second diffusion layer. The potential on the first diffusion layer is kept unchanged to constantly maintain the initially-applied bias voltage even when the memory cell is selected, so that the first diffusion layer is permitted to be coupled to the common wiring line together with the corresponding first diffusion layers of the other memory cells.

Image forming method and image forming apparatus

Abstract: An image forming apparatus is formed by providing a latent image-bearing member for holding an electrostatic image thereon and a toner-carrying member for carrying a prescribed magnetic toner comprising a binder resin and magnetic powder and having a particle size distribution including 12% by number or more of magnetic toner particles of 5 microns or smaller, 33% by number or less of magnetic toner particles of 8-12.7 microns and 2% by volume or less of magnetic toner parcitles of 16 microns or larger so as to provide a volume-average particle size of 4-10 microns. At the developing station, an alternating bias voltage comprising a DC voltage and an unsymmetrical AC voltage in superposition is applied between the toner-carrying member and the latent image-bearing member to provide an alternating bias electric field comprising a development-side voltage component and a reverse-development side voltage component. The development-side voltage component has a magnitude equal to or larger than that of the reverse development-side voltage component and a duration smaller than that of the reverse-development side voltage component, so that the magnetic toner on the toner-carrying member, particularly fine powdery fraction thereof effective for high-quality development, is effectively transferred to the latent image-bearing member to develop the electrostatic image thereon at the developing station.

Hot‐electron limitation to the sensitivity of the dc superconducting quantum interference device

Abstract: The noise energy of conventional thin‐film dc superconducting quantum interference devices (SQUIDs) flattened out as the operating temperature was lowered below 140 mK. We attribute this saturation to the heating of the electrons in the resistive shunts by the SQUID bias current. This ‘‘hot‐electron effect’’ is a general property of normal metals at low temperatures and arises from the limited rate at which the electrons can transfer energy to phonons. The temperature of the electrons, and hence the noise energy of the SQUIDs, was reduced by a factor of about 3 by attaching large volume ‘‘cooling fins’’ to each shunt.

Analytical and experimental methods for zero-temperature-coefficient biasing of MOS transistors

Abstract: Analytical and experimental results are presented which yield new design insights for VLSI CMOS circuits to be operated over wide temperature ranges (25–25O°C). The significant influence of the body voltage on the zero-temperature-coefficient (ZTQ drain current characteristics of MOSFETs is reported and modelled. Our results suggest that state-of-theart VLSI CMOS technologies can be used to design on-chip voltage and current references and therefore a wide class of signal processing IC functions, which are stable over wider temperature ranges than have been achieved to date.

Substrate bias voltage generating and regulating apparatus

Abstract: An apparatus for generating and regulating a substrate bias voltage for use in semiconductor devices. The invention comprises a sensor which is responsive to the substrate bias voltage, and generates a continuously variable regulating voltage and a continuously variable oscillator bias voltage. A variable impedance device whose resistance is adjustable over a range of values as a function of said regulating voltage is coupled to a charge pump to control the amount of charge pumped by said charge pump per unit time from the substrate of the semiconductor device. An oscillator whose frequency is continuously controlled by the oscillator bias voltage from the sensor is coupled to said charge pump so as to further control the amount of charge pumped by said charge pump per unit time.

S parameter measurements on single superconducting thin-film three-terminal devices made of high-Tc and low-Tc materials

Abstract: We have investigated three‐terminal single‐layer thin‐film superconducting devices made of YBaCuO and Nb. The devices incorporate regions of weak superconductivity in multiple parallel links that are influenced by current in a separate control line. These experiments were designed to study the possible application of this device as an rf amplifier. With the device biased, rf power was applied to the control line and the transmission coefficient, S21, was measured. The reverse transmission coefficient, S12, was also measured for comparison. Upon biasing into a flux flow state, the S21 of the device at rf frequencies was found to increase 10–15 dB over the zero bias value and over the reverse feed (S12 ) value. The device behaved linearly up to power inputs of +5 dBm (1‐dB compression point). The bandwidth was limited only by the impedance transformer.

Method and apparatus for recovery from low impedance condition during cathodic arc processes

Abstract: Techniques for recovery from a low impedance conditions during cathodic arc or electric vapor thin film processes are disclosed. Sensing of a low impedance condition is achieved followed automatically by active clearing of the cloud to return it to the proper impedance or resistance state. Active clearing is accomplished by a progressive increase in the output of bias voltage supply. Regulation of the bias voltage supply switches between voltage or power modes and a current mode of regulation. Circuitry disclosed is designed to readily modify existing power supplies to achieve the methods discussed and to linearly increase the current output by it.

Semiconductor substrate bias circuit

Abstract: A semiconductor substrate bias circuit is disclosed which comprises: first and second substrate biasing means connected in parallel between the substrate and a ground node, for pumping the charges from said substrate to said ground node or in the reverse direction in order to bias said substrate; and a detecting means for selectively enabling said first and second substrate biasing means in accordance with the levels of the substrate bias voltage. The circuit of the present invention is capable of supplying adequate bias voltages depending on the various operating modes, reducing the standby current loss at a standby state, and is suitable for being installed on a VLSI semiconductor chip.

Method and apparatus for controlling the bias current of a laser diode

Abstract: An apparatus controls the optical output intensity of a laser diode 52 used in an optical communication system The laser diode 52 receives current from a pulse current supply 74 and a bias current supply 72 The optical output intensity of the laser diode 52 is controlled via a closed bias current control loop that includes a photodiode 50, which supplies a signal having a magnitude correlative to the optical output intensity of the laser diode 52 The closed bias current control loop monitors the trough level of the photodiode output to regulate the bias current supply 72 Thus, the output of the photodiode 50 is delivered to a means 56 for detecting the magnitude corresponding to the minimum magnitude of the optical output of the laser diode 52 The voltage corresponding to this detected low level is compared to a preselected voltage level V r and the difference in the two signals is delivered to the bias current supply through an integration circuit 66 Thus, as the optical output intensity of the laser diode 52 shifts with temperature or age degradation, the bias current supply correspondingly increases the current delivered to the laser diode 52 in order to maintain a constant optical output intensity

Extremely low‐noise potentiometry with a scanning tunneling microscope

Abstract: Novel ac biasing and detection techniques have been developed to allow a scanning tunneling microscope (STM) to measure spatial variations in electric potential on metallic surfaces with sub‐μV sensitivity. When implemented with a room‐temperature STM operating with minimal electrical shielding and no vibration isolation, the voltage sensitivity was limited by the thermal (Johnson) noise of the tunneling resistance.

RF power amplifier system having amplifier protection

Abstract: The amplifier includes a bridge circuit having an input circuit adapted for connection across a DC voltage source and an output circuit connected across a load. The bridge circuit includes first and second transistors for, when on, connecting the DC voltage source across the load for DC current flow therethrough in a first direction and third and fourth transistors for, when on, connecting the DC voltage source across the load for DC current flow therethrough in a second direction. The transistors are controlled by an RF signal so that they turn on and off at a frequency dependent upon that of the RF signal such that current flows from the DC source alternately in the first and second directions through the load. An amplifier control serves to apply a reverse bias to the second and fourth transistors to prevent them from conducting current until receipt of a turn on signal, which actuates the controller to remove the reverse bias from the second and fourth transistors such that the reverse bias applied to the fourth transistor is removed during a first half cycle of the RF signal when the fourth transistor is off and that the reverse bias applied to the second transistor is removed during a succeeding half cycle of the RF signal when the second transistor is off. Circuit means are provided that respond to the fourth transistor being turned on subsequent to the removal of the reverse bias applied thereto for removing the reverse bias from the second transistor.

Apparatus for coating a surface with a metal utilizing a plasma source

Abstract: An apparatus and method for coating or layering a surface with a metal utilizing a metal vapor vacuum arc plasma source. The apparatus includes a trigger mechanism for actuating the metal vacuum vapor arc plasma source in a pulsed mode at a predetermined rate. The surface or substrate to be coated or layered is supported in position with the plasma source in a vacuum chamber. The surface is electrically biased for a selected period of time during the pulsed mode of operation of the plasma source. Both the pulsing of the metal vapor vacuum arc plasma source and the electrical biasing of the surface are synchronized for selected periods of time.

Novel drain-biased transconductance building blocks for continuous-time filter applications

Abstract: A family of continuous-time RC filter building blocks is introduced which uses the linear transconductance of an MOS transistor operating in the triode region as a tunable element. The conductance is tuned by controlling the transistor's drain voltage through a bias current. This technique offers a wide input linear range, good frequency behaviour, ease of tuning and high input impedance.

Numerical simulation of transient response and resonant-tunneling characteristics of double-barrier semiconductor structures as a function of experimental parameters

Abstract: The tunneling current characteristics and transient response of double‐barrier semiconductor structures are simulated for different barrier and quantum‐well widths, barrier heights, operating bias voltage, and ambient temperatures, using the equation for the Wigner distribution function. The numerical results suggest the following: (a) There is a particle buildup inside the quantum well prior to the resonant current peak as the applied bias is varied: (b) the number of resonant energy levels seen in the simulation agrees with its proportionality to the square root of the product of the barrier height and quantum‐well width: (c) the resonant peak width is larger for higher resonant energy levels than for the lower resonant energy levels in agreement with the different degree of localization of these levels; (d) at T=77 K, the current slowly increases with bias at lower bias than for T=300 K, with higher peak‐to‐valley ratio at T=77 K, presumably due to a much sharper convolution of the tunneling density and resonant energy level width; and (e) a higher degree of localization and existence of numerically resolved resonant energy level, in the case of asymmetrical barrier widths, occurs when the thicker barrier is located in the side with lower electron potential or higher voltage bias; no negative differential resistance was observed when these barrier widths were interchanged in our simulation. The superior accuracy of an alternative finite difference scheme, coupled with the Cayley form for the time evolution operator, in this type of numerical simulation is briefly discussed.

Voltage stabilizer with a very low voltage drop designed to withstand high voltage transients

Abstract: A voltage stabilizer with a very low voltage drop includes a series voltage regulator circuit having a first PNP transistor connected to an input terminal of the stabilizer via a second PNP transistor and being connected to ground via a capacitor. The stabilizer has biasing and switching circuits disposed between the input terminal thereof, a base terminal of the second transistor and ground.

Linear power regulator with current limiting and thermal shutdown and recycle

Abstract: A power supply has the source and drain of a MOSFET arranged for connectionetween an input voltage source and a load. In normal operation a bias voltage is applied to the gate to place the MOSFET in a conductive state. A difference amplifier maintains a fixed ratio between a reference voltage and the output voltage. Current limiting circuitry senses the current that the power supply provides to the load and disables the MOSFET when the current provided to the load exceeds a predetermined value. Thermal shutdown circuitry senses the operating temperature of the power supply and places the MOSFET in a nonconductive state when the operating temperature exceeds a predetermined value.

A multiple-input OTA circuit for neural networks

Abstract: An operational transconductance amplifier (OTA) circuit suitable for modeling neurons in VLSI implementations of artificial neural networks (NN) is described. It generates an output voltage which is a sigmoidal-like function of the linear sum of a number of weighted inputs. The weight of each input is individually controlled by a bias voltage which can be varied continuously and dynamically. Large numbers of these cells can be fashioned in regular arrays. It appears to be efficient because each weighted connection is implemented with only two MOSFET transistors. >

Intrinsic GaAs MESFET equivalent circuit models generated from two-dimensional simulations

Abstract: An accurate, physically based two-dimensional GaAs MESFET model is used to generate small-signal and large-signal equivalent circuit models useful for the evaluation of GaAs device structures and GaAs integrated circuits. The models and the simulation techniques described provide a useful means of evaluating RF performance on the basis of the physical properties of the FET. As an example, the small- and large-signal device characteristics are evaluated as a function of drain-source bias voltage and lattice temperature for a 0.8- mu m gate length FET. The small-signal results show severe degradation of frequency response with increase of drain-source bias voltage because of a high electric field in the conduction channel. The large-signal results show that the decrease in RF power capability with temperature increase is primarily due to declining current capability with temperature. >