Showing papers on "Delta-sigma modulation published in 1994"

Communication Systems Engineering

Abstract: (NOTE: Each chapter concludes with Further Reading and Problems.) 1. Introduction. Historical Review. Elements of an Electrical Communication System. Communication Channels and Their Characteristics. Mathematical Models for Communication Channels. Organization of the Book. 2. Frequency Domain Analysis of Signals and Systems. Fourier Series. Fourier Transforms. Power and Energy. Sampling of Bandlimited Signals. Bandpass Signals. 3. Analog Signal Transmission and Reception. Introduction to Modulation. Amplitude Modulation (AM). Angle Modulation. Radio and Television Broadcasting. Mobile Radio Stations. 4. Random Processes. Probability and Random Variables. Random Processes: Basic Concepts. Random Processes in the Frequency Domain. Gaussian and White Processes. Bandlimited Processes and Sampling. Bandpass Processes. 5. Effect of Noise on Analog Communication Systems. Effect of Noise on Linear-Modulation Systems. Carrier-Phase Estimation with a Phase-Locked Loop (PLL). Effect of Noise on Angle Modulation. Comparison of Analog-Modulation Systems. Effects of Transmission Losses and Noise in Analog Communication Systems. 6. Information Sources and Source Coding. Modeling of Information Sources. Source-Coding Theorem. Source-Coding Algorithms. Rate-Distortion Theory. Quantization. Waveform Coding. Analysis-Synthesis Techniques. Digital Audio Transmission and Digital Audio Recording. The JPEG Image-Coding Standard. 7. Digital Transmission through the Additive White Gaussian Noise Channel. Geometric Representation of Signal Waveforms. Pulse Amplitude Modulation. Two-Dimensional Signal Waveforms. Multidimensional Signal Waveforms. Optimum Receiver for Digitally Modulated Signals in Additive White Gaussian Noise. Probability of Error for Signal Detection in Additive White Gaussian Noise. Performance Analysis for Wireline and Radio Communication Channels. Symbol Synchronization. 8. Digital Transmission through Bandlimited AWGN Channels. Digital Transmission through Bandlimited Channels. The Power Spectrum of Digitally Modulated Signals. Signal Design for Bandlimited Channels. Probability of Error in Detection of Digital PAM. Digitally Modulated Signals with Memory. System Design in the Presence of Channel Distortion. Multicarrier Modulation and OFDM. 9. Channel Capacity and Coding. Modeling of Communication Channels. Channel Capacity. Bounds on Communication. Coding for Reliable Communication. Linear Block Codes. Cyclic Codes. Convolutional Codes. Complex Codes Based on Combination of Simple Codes. Coding for Bandwidth-Constrained Channels. Practical Applications of Coding. 10. Wireless Communications. Digital Transmission on Fading Multipath Channels. Continuous Carrier-Phase Modulation. Spread-Spectrum Communication Systems. Digital Cellular Communication Systems. Appendix A: The Probability of Error for Multichannel Reception of Binary Signals. References. Index.

A third-order sigma-delta modulator with extended dynamic range

Abstract: Oversampling modulators based on high-order sigma-delta modulation provide an effective means of achieving high-resolution analog-to-digital conversion in VLSI technology. Because high-order noise shaping greatly reduces the quantization noise in the signal band, the dynamic range of these modulators tends to be bounded by the thermal noise of the input stage and the maximum voltage swing in the signal path. This paper introduces a third-order cascaded sigma-delta modulator that uses a modified cascaded architecture and reduced gain in the first integrator to increase the dynamic range. An experimental modulator fabricated in a 1-/spl mu/m CMOS technology attains a resolution of 17 b for a 25-kHz signal bandwidth while operating from a single 5-V supply. With an oversampling ratio of 128 and a clock frequency of 6.4 MHz, the modulator achieves a 104-dB dynamic range and a peak signal-to-noise+distortion ratio (SNDR) of 98 dB. As indicated by both measurements and simulations, the cascaded architecture also greatly reduces the discrete noise peaks that can be present in a single-stage architecture. >

Stability analysis of high-order delta-sigma modulation for ADC's

Abstract: A model for /spl Delta//spl Sigma/ A/D modulators that allows stability analysis using linear methods is described. This model draws out the dependence of stability on system parameters such as integrator gains and delays as well as the dependence on dynamic characteristics such as input amplitude, transients, and initial conditions. In addition, high-order systems are found to be prone to a previously unrecognized source of instability, saturation limit cycles. Stabilizing high-order systems requires controlling the saturation limit cycles, minimizing the integrator delays, and the proper choice of integrator gains. The dominant means of stabilizing high-order systems, however, is identified to be the use of multi-bit quantization since this transforms the nature of the system rather than just restricting the region of operation. >

Sigma-delta analog-to-digital converter with filtration having controlled pole-zero locations, and apparatus therefor

Abstract: A sigma-delta (ΣΔ) analog-to-digital converter (ADC) accepts band-limited analog signals, and subtracts an analog replica of an output pulse- or amplitude-density modulated (ADM) signal therefrom to produce an error signal. The error signal is processed by an analog filter or resonator with a nondelayed forward path and a tapped nonaccumulating delay line, and summed feedback and feedforward weights coupled to the taps, to thereby produce a resonated signal. An ADC processes the resonated signal, and produces the ADM signal. The ADC undesirably produces quantization noise. A digital-to-analog converter (DAC) noiselessly converts the PDM signal into the analog replica, to aid in forming the error signal. In a particular embodiment of the invention, the resonator includes a recursive analog transversal filter with delays and linear weighting elements for linearity and high operating speed. The ADC may be in a high-speed system such as a radar.

An oversampling delta-sigma frequency discriminator

Abstract: A circuit technique for performing oversampled A/D conversion on the phase/frequency information of an angle modulated signal is presented. It is shown that the technique is equivalent to a classic delta-sigma data conversion with instantaneous frequency as the input variable. Details of first and second-order implementations of the technique are presented, and suitability of the technique is discussed for applications such as in the rapidly evolving personal communications field. The most immediate application will be at the IF stage of a receiver where the discriminator input signal is bandlimited by the IF filter, and where sufficient amplification has occurred to provide the input signal levels required by the discriminator. >

Multistage bandpass DELTA SIGMA modulators and analog-to-digital converters

Abstract: An architecture for oversampled delta-sigma ((Delta)-(sigma)) analog-to-digital (A/D) conversion of high-frequency, narrow-band signals includes multistage (Delta)-(sigma) modulators that incorporate band-reject noise shaping centered at one fourth the clock frequency Fs These modulators cascaded with a bandpass digital filter also centered at a frequency of Fs/4 perform A/D conversion for high-frequency, narrow-band signals centered at the same frequency The bandpass modulators are implemented by use of resonators in existing low-pass multistage modulators

Apparatus and method for sampling signals synchronous with analog to digital converter

Abstract: This invention provides various methods and techniques for providing a synchronous programming of a microcontroller and its associated analog to digital converter for a maximum rate of taking digital samples of alternating current analog signals which techniques are selectively combined to provide microcontroller based controls and protective relays such as for use with electric utilities.

Analog-to-digital converters using multistage bandpass delta sigma modulators with arbitrary center frequency

Abstract: An architecture for oversampled delta-sigma (Δ--Σ) analog-to-digital (A/D) conversion of high-frequency, narrow-band signals includes multistage Δ--Σ modulators that incorporate band-reject noise shaping centered at an arbitrary center frequency F bp . These modulators cascaded with a bandpass digital filter centered at the arbitrary center frequency F bp perform A/D conversion for high-frequency, narrow-band signals having the same arbitrary frequency. The bandpass modulators are implemented by use of resonators which provide a substantially large gain at the arbitrary frequency.

Granular quantization noise in a class of delta-sigma modulators

Abstract: The trend toward digital signal processing in communication systems has resulted in a large demand for fast accurate analog-to-digital (A/D) converters, and advances in VLSI technology have made /spl Delta//spl Sigma/ modulator-based A/D converters attractive solutions However, rigorous theoretical analyses have only been performed for the simplest /spl Delta//spl Sigma/ modulator architectures Existing analyses of more complicated /spl Delta//spl Sigma/ modulators usually rely on approximations and computer simulations In the paper, a rigorous analysis of the granular quantization noise in a general class of /spl Delta//spl Sigma/ modulators is developed Under the assumption that some input-referred circuit noise or dither is present, the second-order asymptotic statistics of the granular quantization noise sequences are determined and ergodic properties are derived >

On the use of chaos to reduce idle-channel tones in delta-sigma modulators

Abstract: Delta-sigma modulators are popular circuits for constructing high precision analog-to-digital and digital-to-analog converters. These systems contain a single nonlinear element (a quantizer) embedded in an otherwise linear system, and can exhibit such nonlinear behavior as limit cycles, subharmonics, phase-locking and chaos. Due to the discrete spectra that result when limit cycles are present, human listeners perceive objectionable tones in the quantization noise. This problem can be overcome by using dither or, as this paper suggests, by making the modulator chaotic. The effectiveness of the technique is illustrated and its impact on modulator complexity, stability, and performance is discussed. >

Method and apparatus for measuring distance to a target

Abstract: The invention performs coordinate measurement employing multiple-frequency intensity-modulated laser radar. A laser diode source is intensity modulated by variation of its excitation current. Its output beam is directed to a target using scanning mirrors or other opto-mechanical means, and the light returned from the target is detected. The modulation frequency is alternated between two or more values, creating a dataset of several relative phase measurements that uniquely determine the distance to the target without ambiguity. A device for carrying out such a method includes a laser whose output is modulated by a high frequency signal generator, optics for directing the output signal to the target to a detector, a signal generator which generates reference signals offset in frequency from the intensity modulation frequencies by a predetermined amount; mixers for combining the return signals with the reference signals to form a first set of intermediate frequency signals, and for combining the modulation signals with the reference signals to form a second set of intermediate frequency signals, and a computer which calculates phase differences between the output beam and the return signals for each modulation frequency from the intermediate frequencies, and determines the distance to the target from the phase differences.

Multi band sigma delta analog to digital conversion

Abstract: A multi band approach to oversampled noise shaping analog to digital conversion is described. The multi band A/D converter breaks the signal band into several smaller bands and uses a different band reject noise shaping transfer function for each band. A FIR filter bank attenuates the out-of-band noise for each band and reconstructs the signal. This approach allows performance improvements over conventional noise shaping A/D converters which convert the entire signal band using one noise shaping transfer function. A design example and simulation results where a signal with 512 kHz bandwidth is converted to about 16 bits of resolution is presented. >

A digitally-corrected 20b delta-sigma modulator

Abstract: Transducers such as photodiodes produce signal currents in the 1 pA to 1 /spl mu/A range. To achieve a six-decade dynamic range, thermal noise currents at the system input must be minimized. The authors show that including the transimpedance photodiode amplifier in a delta-sigma modulated loop with digitally-corrected trilevel quantizers/DACs leads to lower thermal noise. The characteristics of the modulator are summarized. >

Multiplexed delta-sigma modulator

Abstract: A multiplexed delta-sigma modulator for performing analog to digital conversion on a plurality of input analog signals. These input analog signals are input to a multiplexer, where the input analog signals are converted into a single, time-division multiplexed analog signal. The time-division multiplexed analog signal is then received by the delta-sigma modulator, which oversamples the input signal and outputs a time-division multiplexed digital signal. The time-division multiplexed digital signal is then sent to a decimator which outputs a time-division multiplexed digital signal at a rate corresponding to the Nyquist rate of the input analog signals. The signal is sent from the decimator to a first down-sampler, and then to a demultiplexer, where the time-division multiplexed, decimated signal is sent to the appropriate output port of the demultiplexer at a sequential rate corresponding to the sequential rate utilized by the input multiplexer. At each output port of the demultiplexer there is a second down-sampler operating at a predetermined rate to recover each of the plurality of digital output signals corresponding to the plurality of input analog signals.

A stereo audio sigma-delta A/D-converter

Abstract: A stereo sigma delta A/D-converter for audio applications is presented. In this converter, two identical cascaded fourth-order sigma-delta modulators and a sophisticated multistage linear-phase FIR decimation filter with oversampling ratio of 64 are implemented on the same die. The analog part is designed to operate at a low voltage with a low power consumption. Techniques to achieve simultaneously a high performance and a low power consumption are discussed in details. The minimum stopband attenuation of the decimator is more than 120 dB and the passband ripple of the overall converter is less than 0.0003 dB. The first decimation stage is a special tapped comb filter, whereas the remaining stages are realized without general multipliers by simultaneously implementing all the filter coefficients by using special bit-serial networks. For the integrated overall stereo converter, the power consumption and the signal-to-noise ratio are 180 mW and 97 dB (85 mW and 95 dB) for a 5 V (3 V) power supply. The circuit die area is only 4.7 mm/spl times/5.5 mm using a 1.2 /spl mu/m double-poly BiCMOS process. >

Mismatch effects in time-interleaved oversampling converters

Abstract: Recently, a new architecture was proposed which utilizes the concept of time-interleaving in oversampling converters. Using this architecture, one is theoretically able to achieve higher resolutions by using an array of interconnected modulators without increasing the oversampling ratio or order of the modulators. Alternatively, the same resolution can be maintained with wider bandwidth input signals. This paper presents the first experimental results on this new family of modulators. As well, the practical issue of component mismatch for these converters are studied and some suggestions are made to alleviate the effects of this problem. >

A BIST technique for a frequency response and intermodulation distortion test of a sigma-delta ADC

Abstract: Built-in-self-test (BIST) for VLSI systems is desirable for production-time testing and in the field diagnostics. This paper discusses a Mixed Analog Digital BIST (MADBIST) for a frequency response test and an intermodulation distortion test of an Analog-to-Digital converter. The MADBIST strategy for the FR and IMD tests of the ADC is introduced, accuracy issues are discussed, and preliminary experimental results are presented. >

Sigma Delta analog to digital converter with three point calibration apparatus and method

Abstract: An analog to digital converter 10 has a switched capacitor analog modulator 12 with three point calibration. Offset calibration applies on offset correction value in OCR 22 to an uncalibrated digital output. Register 28 holds a desired full scale value, register 24 holds a positive full scale value, and register 26 holds a negative full scale value. Depending upon the polarity of the converted analog signal, the offset corrected digital signal is multiplied by a positive or a negative gain correction factor.

A bandpass subsampled delta-sigma modulator for narrowband cellular mobile communications

Abstract: Radio receivers for digital cellular systems must respect tight constraints in terms of selectivity and dynamic range. Delta-sigma analog-to-digital converters offer a response to the last problem thanks to their high resolution. On the other hand, selectivity is often achieved by filtering the received signal at an intermediate frequency (IF). Limitations of A/D converters impose usually an extra IF conversion of the signal to a lower frequency before being able to properly digitize it. We propose a new delta-sigma converter operating directly on the IF signal allowing the design of simple receivers offering both a high resolution and a good selectivity. Undersampling the IF signal allows reduction of the load of the digital section of the receiver. >

A 126 dB linear switched-capacitor delta-sigma modulator

Abstract: Low-frequency measurement applications where low power, high dynamic range and high linearity are important naturally migrate toward oversampling converters. Measuring seismic activity is one such application that requires at least 120 dB S/D. The switched-capacitor delta-sigma modulator presented in this paper achieves the above goals with single-ended linearity in excess of 120 dB. Various distortion mechanisms in switched-capacitor topologies are explained along with solutions. >

Sigma-delta analog-to-digital converter (ADC) with feedback compensation and method therefor.

Abstract: A sigma-delta analog-to-digital converter (ADC) (80) includes first (81) and second (82) integrators, a quantizer (83) connected to an output of the second integrator (82), and a feedback circuit (84) connected to the output of the quantizer (83). In order to avoid the effects of delays through actual circuit elements, the feedback circuit (84) keeps the feedback signal to the first integrator (81) in a high-impedance state until the quantizer (83) resolves the output of the second integrator (82). Thus, the first integrator (81) avoids temporarily summing a possibly incorrect feedback signal. In addition, the feedback circuit (84) also keeps the first integrator (81) from integrating a sum of an input signal and the feedback signal until the feedback signal is driven to its correct state in response to the output of the quantizer (83). To accomplish these results, the feedback circuit (84) includes a compensation circuit (151) for continually determining when the quantizer (83) resolves.

Sigma-delta modulator having reduced delay from input to output

Abstract: Described herein is a fourth-order sigma-delta modulator which utilizes two second-order sigma-delta modulators connected together. Each second-order sigma-delta modulator is characterized as including integrators having a 1/2 sample period delay from input to output. A second-order sigma-delta modulator, including such integrators, exhibits a single sample period delay from input to output. A fourth-order sigma-delta modulator, which includes two such second-order sigma-delta modulators, exhibits a delay of two sample periods from input to output. The present sigma-delta modulator can be fabricated using switched capacitor circuitry to form an A/D convertor, and in another embodiment can be used as a digital noise shaper for a D/C convertor circuit. The 1/2 unit delay is implemented without requiring two D-flip flops in series, which results in a design and manufacturing advantage.

Digital decimation filter for delta sigma analog-to-digital conversion with reduced hardware compelexity

Abstract: A decimation filter includes a plurality of integration stages, at least one decimation stage, and a plurality of differentiation stages followed by a FIR filter. At least one of the integration stages, the decimation stage, and the differentiator stages, and the FIR filter are implemented in a single ALU which includes a single adder, a ROM, and a RAM. The different sampling rates of the integrator stage and the FIR filter requires the storage of intermediate results in RAM of the FIR filter calculations.

A sixth-order triple-loop sigma-delta CMOS ADC with 90 dB SNR and 100 kHz bandwidth

Abstract: The conversion rate of high-resolution wideband sigma-delta ADCs is limited by need for high oversampling ratio, typically 64 or more, for rejection of quantization noise. These rates lead to high amplifier power, large power-hungry digital filters, and difficult-to-drive signal and reference inputs. For 16b performance with low oversampling ratio it is necessary to use high-order noise shaping and/or multi-level quantizers and DACs, both leading to problems in design or manufacture if realized directly. The ADC described here consists of three cascaded second-order three-level loops giving a sixth-order noise-shaping function without linearity and stability problems from component mismatch or quantizer overload. >

Efficient narrowband FIR and IFIR filters based on powers-of-two sigma-delta coefficient truncation

Abstract: A new quantization scheme is presented for truncating the values of a high precision digital sequence to only a few non-zero bits. Sigma-delta modulation is used to round values to the nearest n-bit canonic signed-digit code (number representable as sum or difference of at most n powers-of-two) such that the quantization error is moved to higher frequencies. This technique can be applied to the impulse response of an FIR filter to truncate the coefficient values to a few non-zero bits; eliminating the need for multiplications. The resulting filter's magnitude response will be accurate over low frequencies and is thus suitable for narrowband lowpass applications. Sigma-delta CSD truncation is applied to previous multiplier efficient approaches for narrowband filters (prefilter-equalizer, multirate) and examples are given which show an additional 4 to 64 times reduction in computational complexity. The sigma-delta CSD interpolated FIR (SCIFIR) filter is presented and examples are given which show an additional 29%-65% reduction in computational complexity over previously reported multiplier efficient IFIR designs. >

Parallel delta-sigma A/D conversion

Abstract: This paper presents an architecture wherein multiple delta-sigma modulators are combined so that neither time oversampling nor time interleaving are necessary. For a system containing M Pth-order delta-sigma modulators, approximately P bits of accuracy are gained for every doubling of M. Thus, the resolution gained by combining M delta-sigma modulators is approximately the same as that with the same modulator with an oversampling rate of M. Measured results from a 16-channel parallel delta-sigma A/D converter composed of second-order delta-sigma modulators verify the theory and demonstrate that this architecture retains much of the robustness of the individual delta-sigma modulators to non-ideal circuit behavior. >

Digital to analog converter with improved output level control

Abstract: A digital to analog converter is described for a multimedia system in which the magnitude of the analog output is controlled by signals applied to level select inputs of the digital to analog converter. Digital signals to be converted to an analog output are connected to a different set of inputs. This converter is advantageous for use in a display system where the brightness of the display may be independently controlled by the signals applied to the level select inputs. In this way, the digital information signals to be converted to an analog signal need not be modified to increase or decrease the brightness of the display.

Modulation/demodulation method and system for realizing quadrature modulation/demodulation technique used in digital mobile radio system with complex signal processing

Abstract: In a complex modulation/demodulation method and system, the data frequency f C1 of data signals I and Q inputted to a constellation mapping circuit is converted by a digital interpolation circuit into a sampling frequency f C2 equal to f S /N, where f S is an operation sampling frequency and N is selected such that the signal maximum frequency of the data signals I and Q becomes lower than f C2 /2. The interpolated data signals I and Q are respectively inputted to real and imaginary input terminals of a complex coefficient band pass filter to extract a real signal output. An output signal of the complex coefficient band pass filter is converted by a DA converter into an analog signal from which desired frequency components are extracted by an analog band pass filter, thereby performing a quadrature modulation.