Proceedings ArticleDOI
A sixth-order triple-loop sigma-delta CMOS ADC with 90 dB SNR and 100 kHz bandwidth
I.J. Dedic
- pp 188-189
TLDR
The ADC described here consists of three cascaded second-order three-level loops giving a sixth-order noise-shaping function without linearity and stability problems from component mismatch or quantizer overload.Abstract:
The conversion rate of high-resolution wideband sigma-delta ADCs is limited by need for high oversampling ratio, typically 64 or more, for rejection of quantization noise. These rates lead to high amplifier power, large power-hungry digital filters, and difficult-to-drive signal and reference inputs. For 16b performance with low oversampling ratio it is necessary to use high-order noise shaping and/or multi-level quantizers and DACs, both leading to problems in design or manufacture if realized directly. The ADC described here consists of three cascaded second-order three-level loops giving a sixth-order noise-shaping function without linearity and stability problems from component mismatch or quantizer overload. >read more
Citations
More filters
Journal ArticleDOI
An overview of sigma-delta converters
TL;DR: This article describes conventional A/D conversion, as well as its performance modeling, and examines the use of sigma-delta converters to convert narrowband bandpass signals with high resolution.
Journal ArticleDOI
Delta-Sigma modulator based A/D conversion without oversampling
Ian Galton,H.T. Jensen +1 more
TL;DR: An architecture wherein multiple /spl Delta//spl Sigma/ modulators are combined so that neither time oversampling nor time interlacing are necessary, which offers the potential of integrating high-precision, high-speed A/D converters together with digital signal processing functions using VLSI processes optimized for digital circuitry.
An Overview of Sigma-Delta Converters: How a 1-bit ADC achieves more than 16-bit resolution
TL;DR: The technique of oversampling is looked at, which can be used to improve the resolution of classical A/D methods and how sigma-delta converters use the technique of noise shaping in addition to oversampled to allow high resolution conversion of relatively low bandwidth signals.
Journal ArticleDOI
Oversampling parallel delta-sigma modulator A/D conversion
Ian Galton,H.T. Jensen +1 more
TL;DR: The extension developed in this paper allows for oversampling to be combined with parallelism such that an M-channel system with an oversampled ratio of N can achieve a conversion performance close to that of a conventional /spl Delta//spl Sigma/ADC with an Oversampling ratio of M/spl times/N.
Journal ArticleDOI
A 13-bit, 1.4-MS/s sigma-delta modulator for RF baseband channel applications
TL;DR: A 13-bit, 1.4-MS/s, sixth-order cascaded sigma-delta modulator oversampling at 16 X is implemented in a 0.72 /spl mu/m complementary metal-oxide-semiconductor process for use in the baseband path of a radio-frequency receiver.
References
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