Showing papers on "Digital signal published in 2008"

Electronic post-compensation of WDM transmission impairments using coherent detection and digital signal processing.

Abstract: A universal post-compensation scheme for fiber impairments in wavelength-division multiplexing (WDM) systems is proposed based on coherent detection and digital signal processing (DSP). Transmission of 10 x 10 Gbit/s binary-phase-shift-keying (BPSK) signals at a channel spacing of 20 GHz over 800 km dispersion shifted fiber (DSF) has been demonstrated numerically.

Indoor Power-Line Communications Channel Characterization Up to 100 MHz—Part I: One-Parameter Deterministic Model

Abstract: Advanced communication technologies have allowed the power-line-communication (PLC) channel to be a transmission medium that enables the transfer of high-speed digital data over the classical indoor electrical wires. The development of PLC systems for Internet, voice, and data services requires measurement-based models of the transfer characteristics of the mains network suitable for performance analysis by simulation. This paper presents a deterministic model describing the magnitude and phase of complex transfer functions of power-line networks using only one parameter. First, a PLC channel classification is realized, and an average magnitude and phase channel model by class is proposed. Second, the multipath characteristic of PLC channels is introduced. A statistical-based channel magnitude generator is built, and a group delay-based phase model is suggested.

Signal processing apparatus and signal processing method

Abstract: Disclosed herein is a signal processing apparatus including: a first decimation processing section for generating, based on a digital signal in a first form, a digital signal in a second form; a second decimation processing section for generating, based on the digital signal in the second form, a digital signal in a third form; a first signal processing section for processing the digital signal in the third form; an interpolation processing section for converting a digital signal in the third form outputted from the first signal processing section into a digital signal in the second form; a second signal processing section for processing the digital signal in the second form outputted from the first decimation processing section; and a combining section for combining the digital signals in the second form outputted from the interpolation processing section and the second signal processing section.

Noise cancellation system with lower rate emulation

Abstract: A noise cancellation system, comprising: an input for a digital signal, the digital signal having a first sample rate; a digital filter, connected to the input to receive the digital signal; a decimator, connected to the input to receive the digital signal and to generate a decimated signal at a second sample rate lower than the first sample rate; and a processor. The processor comprises: an emulation of the digital filter, connected to receive the decimated signal and to generate an emulated filter output; and a control circuit, for generating a control signal on the basis of the emulated filter output. The control signal is applied to the digital filter to control a filter characteristic thereof.

High dynamic range sensor system and method

Abstract: A high dynamic range sensor assembly includes a plurality of sensing sets that are organized into a sensing array. Each of the sensing sets includes a set of sensing elements for sensing physical phenomena. Each set of sensing elements has a locally selectable integration time. An analog-to-digital (A/D) converter operatively connected to the set of sensing elements acquires and converts an analog signal from each of the sensing elements into a digital signal. A processor operatively connected to the A/D converter and to the set of sensing elements manages the selectable integration time for the set of sensing elements and analyzes the digital signals from each of the sensing elements in the set of sensing elements. The digital signals from each of the sensing elements are measured by the processor and an integration scaling factor for the set of sensing elements is computed and controlled by the processor to adjust the integration time. The integration scaling factor for the set of sensing elements is mathematically combined with a value of the digital signal from the A/D converter to form a larger data word than what is generated by the A/D converter. The larger data word is utilized to represent a magnitude of each of the sensing elements. If a substantial number of A/D values have saturated, the integration time is decreased; and, if a substantial number of A/D values are below a predetermined threshold, the integration time is increased.

Motion capture and analysis

Abstract: Motion capture and analysis is described, including a motion sensor unit configured to capture data associated with movement of an object, to process the data to determine one or more values, to store the data and the one or more values, and to convert the data and the one or more values from an analog signal to a digital signal associated with a wireless transmission, and a display unit configured to receive the data from the motion sensor unit, the data being transmitted using through the wireless transmission, to process the data to determine one or more values, to store the data, and to graphically present the data and the one or more values.

System for diagnosing and monitoring structural health conditions

Abstract: Systems for diagnosing/monitoring structural health conditions of objects. The system, which monitors structural health conditions by use of a plurality of patch sensors attached to an object, includes at least one bridge box and at least one relay switch array module having a plurality of switches. Each of the patch sensors is adapted to perform at least one of generating a wave upon receipt of an actuator signal and developing a sensor signal. The bridge box includes an analogue-to-digital converter (ADC) for converting the sensor signal to a digital signal. The switches are adapted to establish a channel between a selected one of the patch sensors and the ADC.

Method for detecting short burst errors in LDPC system

Abstract: The present invention is a device for detecting short burst errors. The device includes a first signal input, wherein the first signal input is configured to receive a first signal. The device includes a second signal input, wherein the second signal input is configured to receive a second signal. The device includes a logic gate, wherein the logic gate is operable for receiving the first signal vial the first signal input, receiving the second signal via the second signal input, and generating a logic output gate signal based on the received first signal and the second signal. Furthermore, the device includes a filter, wherein the filter is configured for receiving the logic output gate signal from the logic gate and generates a filter output signal based upon the received logic output gate signal, wherein the filter output signal is operable for flagging errors.

Low-delay signal processing based on highly oversampled digital processing

Abstract: A low-delay signal processing system and method are provided which includes a delta-sigma analog-to- digital converter, an oversampling processor, and a delta-sigma digital-to-analog converter. The delta- sigma analog-to-digital converter receives an input or audio signal and generates a digital sample signal at a high oversampling rate. The oversampling processor is connected to the analog-to-digital converter for processing the digital sample signal at the high oversampling rate with low-delay. The delta-sigma digital-to-analog converter is connected to the oversampling processor for receiving the digital sample signal at the high oversampling rate with low-delay for generating an analog signal. The oversampling processor includes a low-delay filter and a programmable delay element. In this manner, the analog signal is produced with a low delay and high accuracy.

Adaptive signal-feed-forward circuit and method for reducing amplifier power without signal distortion

Abstract: Digital amplifying circuitry delays a digital data signal (IN R ) to produce an output signal (Vout R ). The delayed digital data signal is converted to an analog signal (Vin R ) for amplifying by an amplifier ( 10 R). Signal amplitude information (S_R[n]) contained in the incoming digital data signal is detected during the delaying. The signal amplitude information is converted to a first control signal (S_Io_NEG[n]) in response to which an adjustable maximum available supply current of the amplifier is produced of least sufficient magnitude to avoid distortion during the amplifying to produce the output signal. The signal amplitude information also is converted to a second control signal (S_AMPLITUDE[n]) in response to which a supply voltage (V NEG ) of the amplifier is controlled.

Simultaneous multiple signal reception and transmission using frequency multiplexing and shared processing

Abstract: A novel mechanism for simultaneous multiple signal reception and transmission using frequency multiplexing and shared processing. Multiple RF signals, which may be of various wireless standards, are received using one or more shared processing blocks thereby significantly reducing chip space and power requirements. Shared components include local oscillators, analog to digital converters, digital RX processing and digital baseband processing. In operation, multiple RX front end circuits, one for each desired wireless signal, generate a plurality of IF signals that are frequency multiplexed and combined to create a single combined IF signal. The combined IF signal is processed by a shared processing block. Digital baseband processing is performed on each receive signal to generate respective data outputs. Further, simultaneous full-duplex transmission and reception is performed using a single local oscillator. The phase/frequency modulation of the frequency synthesizer used in the TX is removed from the local oscillator signal for use in the receiver.

Short-range ultrasonic digital communications in air

Abstract: The use of ultrasound in air as a means of communicating digital signals is demonstrated. The work uses capacitive transducers with a useful bandwidth to transmit digitally coded signals across an air gap in the laboratory, using three of the common methods used in digital communications. These are on-off keying (OOK), binary frequency-shift keying (BFSK), and binary phase shift keying (BPSK). All three methods are simulated numerically using the available bandwidth of the transducer systems and are compared to results obtained experimentally. It is demonstrated that BPSK can be used to transmit signals with a low bit error rate.

Speakers with a digital signal processor

Abstract: A speaker with a digital signal processor is disclosed. In one aspect, a speaker comprises at least one electromechanical transducer configured to convert an electrical audio signal into sound and a digital signal processor configured to process an audio signal and send the processed audio signal to the electromechanical transducer directly or indirectly.

Full digital High Frequency Surface Wave Radar: French trials in the biscay bay

Abstract: Assessment of actual detection capabilities obtained with high frequency surface wave radar (HFSWR) is a key issue for the global surveillance of the exclusive economic zone (EEZ). ONERA (The French Aerospace Lab) has just finished a ten month trial cycle of its new full digital HFSWR system. This system uses digital signal generation, digital receivers, high computational power workstations and low power transmitters. All results extracted from the trial database are compliant with the theory in particular concerning sea clutter and ionospheric clutter. Moreover, the detection of vessels up to 170 km and aircrafts up to 75 km (results obtained with cooperative targets and ground truth data) shows the over the horizon capabilities of the system. Finally, clutter reduction prospects are also presented.

Automatic Modulation Recognition of Digital Signals using Wavelet Features and SVM

Abstract: This paper presents modulation classification method capable of classifying incident digital signals without a priori information using WT key features and SVM. These key features for modulation classification should have good properties of sensitive with modulation types and insensitive with SNR variation. In this paper, the 4 key features using WT coefficients, which have the property of insensitive to the changing of noise, are selected. The numerical simulations using these features are performed. We investigate the performance of the SVM-DDAG classifier for classifying 8 digitally modulated signals using only 4 WT key features (i.e., 4 level scale), and compare with that of decision tree classifier to adapt the modulation classification module in software radio. Results indicated an overall success rate of 95% at the SNR of 10dB in SVM-DDAG classifier on an AWGN channel.

Systems and methods for digital detection of a tomographic signal

Abstract: Systems and methods for digital detection of an analog tomographic signal are described. The methods include receiving an amplitude-modulated analog signal containing tomographic information, the analog signal having a modulation frequency, f λi ; and converting the analog signal into a digital signal at a sampling frequency, f s , to produce a number of samples, K. The digital signal is multiplied by an in-phase reference signal to obtain an in-phase signal component, the in-phase reference signal having the frequency, fλi; and the digital signal is multiplied by a quadrature reference signal to obtain a quadrature signal component, the quadrature reference signal having the frequency, f λi . The in-phase signal component and the quadrature signal component are passed through the K-point averaging filter. A signal amplitude is computed based on the filtered in-phase signal component and the filtered quadrature signal component, the signal amplitude being representative of the tomographic information.

Advanced receive channel architecture

Abstract: This relates to an architecture of a receive channel circuit used during both a spectrum analysis phase and a touch panel detection phase. Various components of the receive channel can be used during both the spectrum analysis phase and the touch panel detection phase. For example, a plurality of digital signal mixers used in the receive channel circuit can be used to demodulate signals during both a spectrum analysis phase and a touch sensor panel detection phase. In addition, the number of digital mixers needed in the receive channel can be reduced by dividing groups of signals to be demodulated into multiple sets of signals and demodulating each set at different times.

Digital occupancy sensor light control

Abstract: A method of sensing motion in a predetermined area is provided. The method may include using a digital output motion sensor to produce a digital output signal indicative of the presence of motion in the predetermined area. The method may further include transmitting the digital output signal along a signal path independent of analog amplification and filtering. The method may also include using a microprocessor coupled to the signal path to receive the digital output signal and to process the digital output signal.

Digital transmission system and digital transmission method

Abstract: A digital transmission system includes at least a client device and a transmission device, and rate-adjusts the client signal transmitted from the client device to the transmission device before accommodating/multiplexing the signal in a frame. The transmission device includes a rate adjusting unit and a frame processing unit. The rate adjusting unit encapsulates the client signal by using a predetermined frame structure, inserts an idle pattern if necessary, and performs rate adjustment into the bit rate which can be contained in the frame. The frame processing unit accommodates/multiplexes the signal after the rate adjustment. The digital transmission system inserts a bit string of the client signal directly in a payload area of the digital frame, or accommodates and multiplexes it. Alternatively, a specific pattern is accommodated in the payload area, or accommodated and multiplexed after performing a reversible digital signal processing.

System and method of multi-channel signal calibration

Abstract: A signal processing system for reducing calibration-related distortions in a complete-channel signal generated by a multi-channel subsystem, such as an interleaved ADC, includes a channel separator for separating the distorted digital signal into its various sub-channels and a single-channel corrector for independently processing each sub-channel to reduce distortion products present therein. The system additionally includes a subchannel re-combiner for combining the plurality of sub-channels processed by the single-channel corrector and a multi-channel corrector for calibrating each of plurality of sub-channels relative to one another to yield an equalized, complete-channel output signal. The multi-channel corrector includes a bank of optimized filters, each filter being assigned to a corresponding sub-channel of the complete-channel signal. In one embodiment, one of the plurality of sub-channels is selected as an ideal reference signal and the filters assigned to the remaining sub-channels are optimized to yield outputs which match the ideal reference signal.

Predictive Efficiency Optimization for DC–DC Converters With Highly Dynamic Digital Loads

Abstract: This paper presents a novel technique and system for increasing the efficiency of dc-dc converters that supply dynamic electronic loads, such as modern audio and video equipment and other devices whose power consumption largely depends on the digital data they process. The optimization does not require a current-measurement circuit and is well-suited to portable applications. It is based on a real-time prediction of the dc-dc converter output current from easily accessible digital data streams present in the targeted loads. The result of the prediction is used for dynamic adjustment of the power-stage transistor size and/or for switching into pulse-frequency-mode of output voltage regulation, in order to maximize the instantaneous converter efficiency on-the-fly. The use of a segmented power-stage allows the effective power-transistor size to be changed on-the-fly, and the tradeoff between the gate-drive and rms conduction losses is continuously optimized over the full range of operation. The effectiveness of the optimization is demonstrated on an experimental system, including a 1-W digitally controlled 4-MHz, 3.6 V-1.8 V buck converter with an integrated segmented power-stage and a digital high-fidelity class-D audio amplifier acting as the digital load. The results show a good agreement between the digitally predicted and actual dc-dc converter load current, as well as a reduction in total energy consumption of up to 38%.

Method and system for inter-chip communication via integrated circuit package antennas

Abstract: Methods and systems for inter-chip communication via integrated circuit package antennas are disclosed and may include communicating one or more signals between or among a plurality of integrated circuits via one or more antennas integrated in a multi-layer package. The integrated circuits may be bonded to the multi-layer package. The antennas may be configured via switches in the integrated circuits or by MEMS switches integrated in the multi-layer package. The signals may include a microwave signal and a low frequency control signal that may configure the microwave signal. The low frequency control signal may include a digital signal. The antennas may comprise metal and/or ferromagnetic layers deposited on and/or embedded within the multi-layer package.

Rotary clock flash analog to digital converter system and method

Abstract: System and method for converting an analog voltage to a digital signal. The system includes an input voltage sampler, a ramp generator, a comparator, a time-to-digital converter (TDC), and a multiphase oscillator, preferably a rotary traveling wave oscillator, that provides the critical system timing. The phases of the multiphase oscillator define a sampling interval during which the input voltage is sampled and held and a conversion interval during which the ramp generator, comparator, and TDC operate to convert the sampled voltage to the digital signal. The TDC samples at times provided by the phases of the multiphase oscillator to form the bits of the digital signal. The sampler, ramp generator, and comparator can be constructed from multiple fragments, one of which is selectable for calibration while the rest of the fragments are joined for normal operation. Multiple converters can be interleaved to increase the sampling rate.

Wireless communication system

Abstract: PROBLEM TO BE SOLVED: To obtain a wireless communication system that has a wireless transmission device, which is provided with a highly-efficient amplifier and facilitates its configuration, and a wireless receiver. SOLUTION: The wireless transmission device 10 is provided with a serial-parallel converter 11, a constant envelope modulator 12 and a D/A converter 13 which modulate a digital signal of each channel to a constant envelope modulated signal respectively so as to convert the digital signal into an analog signal, a frequency converter 14 for converting the signal of each channel into a different carrier frequency, the amplifier 15 for amplifying the constant envelope modulated signal of each channel, and an antenna 19 that wirelessly transmits the amplified signal into space for each channel. The wireless receiver 20 is provided with an antenna 21, a demultiplexer 22 for demultiplexing a received signal, a frequency converter 23 and an A/D converter 24 which convert the signal of each channel into a baseband frequency so as to convert the signal into the digital signal, a constant envelope demodulator 25 for demodulating the constant envelop demodulated signal of each channel, and a parallel-serial converter 26 that restores the original input digital signal from the digital signal demodulated for each channel. COPYRIGHT: (C)2008,JPO&INPIT

Driving apparatus and display device including the same

Abstract: A liquid crystal display includes a plurality of driving apparatuses one-chipped by including a signal controller controlling a data driver in the data driver applying data voltage to the corresponding data line. Each of the plurality of driving apparatuses includes a first signal terminal and a second signal terminal. The first signal terminal outputs control data for controlling image display to an adjacent signal controller in a first direction for a first period and receives a mode detection signal for determining a final operation mode from the adjacent signal controller in the first direction for a second period after the first period. The second signal terminal outputs the mode detection signal to the adjacent signal controller in a second direction different from the first direction for the first period and receives the control data from the adjacent signal controller in the second direction for the second period.

Chaotic Watermarking for Video Authentication in Surveillance Applications

Abstract: Installing video cameras in public facilities for surveillance becomes more and more popular. This paper proposes a novel authentication scheme based on chaotic semi-fragile watermarking. The timing information of video frames is modulated into the parameters of a chaotic system. The system output, which is a noise-like signal, is used as a watermark and embedded into the block-based discrete cosine transform domain. The embedded information is demodulated by a maximum likelihood estimator. Temporal tampering can be detected by the mismatch between the extracted and the observed timing information. In addition, the deviation of the extracted watermark from the original one allows us to locate spatial tampering. It is shown that the proposed scheme can satisfy the peculiar requirements of authenticating a digital video surveillance system.

Detection and ranging methods and systems

Abstract: There is provided a system and a method for acquiring a detected light optical signal and generating an accumulated digital trace The method comprises providing a light source for illumination of a field of view, an optical detector, an analog-to-digital converter (ADC), emitting one pulse from the light source in the field of view, detecting a reflection signal of the pulse by the optical detector, acquiring j points for the detected reflection signal by the ADC, storing, in a buffer, the digital signal waveform of j points, introducing a phase shift of 2pi / P, repeating, P times, the steps of emitting, detecting, acquiring, storing and introducing, to store, in the buffer, an interleaved waveform of P x j points, accumulating M traces of interleaved P x j points for a total of N = M x P acquisition sets, N being a total number of pulses emitted, creating one combined trace of the reflected signal of j x P points by adding each point of the M traces Additionally, the combined trace can be compared to a detected reference reflection signal of the pulse to determine a distance traveled by the pulse

Systems and methods for a digital stringed instrument

Abstract: Systems and methods for a digital instrument are described, for example to simulate or be used in conjunction with a stringed instrument. A sensor system detects the location of one or more fingers or objects at selected locations on a playing surface of the instrument, and the detected locations are combined with information indicative of one or more strings being played to generate a digital signal containing information as to the notes being played.

Adaptation of a digital receiver

Abstract: A method and apparatus to improve adaptation speed of a digital receiver is presented. The receiver includes an equalizer to initiate adaptation to a transmission channel responsive to a first control signal, a slicer coupled to the equalizer to generate symbol decisions based at least in part on an equalized digital signal, logic to receive the symbol decisions and generate a selection signal when a lock onto a training sequence of the symbol decisions occurs, first and second phase detectors to detect phase errors of the equalized digital signal and an incoming digital signal, respectively, and a clock generator to generate a clock signal responsive to one of the first and second phase errors.

Solid-state imaging device, electronic camera

Abstract: A solid-state imaging device includes a plurality of pixels disposed in a two-dimensional array that individually output analog pixel signals corresponding to amounts of light received thereat, a vertical scanning circuit that selects a pixel row, vertical signal lines each installed in correspondence to a pixel column, through which the pixel signals output from pixels belonging to the row selected by the vertical scanning circuit are transmitted, a horizontal scanning circuit that selects a plurality of pixel columns simultaneously, a composition circuit that combines pixel signals corresponding to the columns selected simultaneously by the horizontal scanning circuit, among the pixel signals output to the vertical signal lines, a first conversion circuit that converts the analog composite pixel signal generated at the composition circuit to a digital signal and a horizontal signal line through which the pixel signal digitized at the first conversion circuit is transmitted.