Showing papers on "Etching (microfabrication) published in 1974"

Fabrication techniques for surface-acoustic-wave and thin-film optical devices

Abstract: The techniques of photolithography, electron lithography, X-ray lithography, ion bombardment etching, and liftoff are reviewed, and their advantages and disadvantages assessed from the point of view of fabricating surface-acoustic-wave and thin-film optical devices.

Method of manufacturing thin-film field-emission electron source

Abstract: A method of manufacturing a thin-film field-emission electron source which is of a sandwich structure of a substrate - metallic film-insulating film - metallic film and which has at least one minute cavity and a field-emitter of, for example, a conical shape within the cavity, comprises the steps of (i) forming on a substrate a first layer of metallic film pattern for current supply, (ii) depositing a second layer film made of an electron emissive material onto the entire area of the substrate provided with the first layer, and thereafter subjecting the second layer film to a mesa etch by a photoetching process, to form a conical emitter on the first layer film, (iii) forming a third layer made of an insulating material, the third layer having a height substantially equal to the level of a tip portion of the emitter, (iv) forming a fourth layer of metallic film pattern as an accelerating electrode, and (v) etching the third layer, so as to expose the extremity of the emitter. According to the manufacturing method, a thin-film field-emission electron source can be readily produced merely by the combination between the standard evaporation techniques and etching techniques.

Apparatus for processing semiconductor wafers

Abstract: Circular wafers of semiconductor (silicon) are chemically treated, e.g., etched, by supporting the wafers vertically by contacting their edges with annularly grooved drive rollers, immersing the supported wafers in a body of chemical medium (e.g., etchant solution) for treatment, and rotating the wafers by rotation of the drive rollers while the wafers are immersed in the body of medium to uniformly and precisely treat the surfaces of the wafers. Apparatus for effecting such precision etching includes an etchant tank, a wafer rack including the drive rollers which support the edges of the wafers in vertical face-to-face relationship, the rack being lowered into the etchant to immerse the wafers. Means is disclosed for rotating the drive rollers for rotation of the immersed wafers and provision is included for circulating the etchant for causing uniform flow thereof past the rotating wafers. A heat exchanger maintains the etchant substantially at a predetermined temperature.

Oxidation of lead films by rf sputter etching in an oxygen plasma

Abstract: The method of forming thin oxide layers by sputter etching in a low‐power rf oxygen discharge (rf oxidation) was investigated Use of the method for oxide formation on Pb films was studied using in situ ellipsometry A steady‐state oxide thickness was observed that depended on the oxidation and sputtering parameters For oxygen pressures of (5–40) × 10−3 Torr and cathode voltages of 175–450 V, the steady‐state oxide thickness was in the 60–90‐A range The oxide layers grown in the rf oxygen discharge had the orthorhombic form of PbO similar to that formed by thermal oxidation However, the PbO layers were found to be nonstoichiometric due to excess oxygen; ellipsometric measurements indicated values of 26–28 and about 01, respectively, for their index of refraction and extinction coefficient

Hot-Pressing Behavior of Si3N4

Abstract: The densification behavior of Si3N4 containing MgO was studied in detail. It was concluded that MgO forms a liquid phase (most likely a magnesium silicate). This liquid wets and allows atomic transfer of Si3N4. Evidence of a second-phase material between the Si3N4 grains was obtained through etching studies. Transformation of α- to β-Si3N4 during hot-pressing is not necessary for densification.

RF Sputter-Etching by Fluoro-Chloro-Hydrocarbon Gases

Abstract: In order to enhance an etching rate using a conventional rf sputtering system, sputtering gases of fluoro-chloro-hydro-carbon were examined, the compositions of which were CF4, CCl2F2, CCl3F, CHCl2F, CHClF2, (CCl2F)2, CCl2FCClF2, and (CBrF2)2. Etching specimens were Si, quartz, glass, Al, Mo, stainless steel and photo resist. With the rf power density of 1.3 W/cm2 at the etching table, the etching rate of Si was ranged from 1000 to 2000 A/min, which were ten to twenty times higher than that by argon. High etching rate is considered to be due the formation of volatile compounds on the surface of specimens. However, etching mechanism is not clarified in detail now. The effect of oxygen on the etching rate was also investigated, and it was found that the etching rate of Si did not decrease up to 12.5% in content of oxygen.

Dry plasma process for etching noble metal

Abstract: There is disclosed a process for etching noble metals, particularly for removing selected areas of thin films of electrically conductive noble metals, by contacting exposed areas of noble metal with a plasma that must include both fluorine and chlorine and may, optionally, also contain oxygen.

Planarization of integrated circuit surfaces through selective photoresist masking

Abstract: An integrated circuit substrate surface, particularly a surface of electrically insulative material, having a pattern of elevated areas and a complementary pattern of unelevated areas is planarized by forming the photoresist pattern in registration with the pattern of unelevated areas, the photoresist pattern having narrower lateral dimensions than said elevated pattern whereby registration is facilitated, flowing the photoresist pattern to laterally expand the photoresist to cover and thereby mask the unelevated areas, and etching to lower the elevated areas which remain uncovered by the photoresist.

Methods for making MOS read-only memories

Abstract: An MOS read-only memory comprises a matrix array of IGFETs which are initially made all to be operable. The array is encoded by etching apertures in the gate electrodes of selected devices and ion implanting impurities through the apertures to render the selected devices inoperative, thus defining digital ''''O''''s.

Solar cell with semiconductor particles and method of fabrication

Abstract: Generally spherical shaped semiconductor particles comprising an inner core of one conductivity type and a thin peripheral layer of opposite conductivity type are produced in a fluidized bed reactor. Silicon particles introduced into the reactor are built up to a desired nominal diameter by vapor deposition from a silicon and dopant containing atmosphere introduced into the reactor; by changing the dopant constituent, the outer peripheral layer is then deposited. One use of such particles is in fabrication of a solar cell, wherein an array of the particles is located on an insulating sheet and overlying conductive layers, insulated from each other, make contact respectively with the peripheral layers and with areas of the core regions, exposed by etching. The particles also may be used to fabricate semiconductor devices, e.g., by use of orientation dependent etches to define flat surfaces on the particles parallel to specific crystallographic planes. Use of other semiconductor materials, e.g., germanium and cadmium slfide also is described.

Polycrystalline silicon pressure transducer

Abstract: A semiconductor pressure transducer having a polycrystalline silicon diaphragm providing an extremely pressure sensitive and temperature stable device, and a method of making the same. The polycrystalline silicon can easily be vapor deposited on an etch resistant layer covering a surface of a wafer or base, preferably monocrystalline silicon. Such vapor deposition of the polycrystalline silicon more accurately and consistently defines the thickness of the diaphragm than can be obtained by grinding or etching. A pressure responsive resistor formed in the diaphragm is automatically electrically isolated by the comparatively high resistivity of the polycrystalline silicon. Accordingly, PN junction isolation and passivating oxides on the diaphragm are not required thereby resulting in increased temperature stability.

Process for making III-V devices

Abstract: A very thin high quality active layer of a III-V material such as GaAs is formed on a temporary substrate on which an etch-resistant stopping layer of a material such as AlGaAs has been previously formed. Passivating layers are formed on the active layer, and the active layer is interfaced with a material which forms a permanent substrate. The temporary substrate is etched away with an etchant which is stopped by the stopping layer, following which the stopping layer is removed by etching with HF. The material in the active layer acts as a chemical stop for the HF, and consequently the etching process stops automaticaly at the boundary of the active layer, leaving that layer in the thin high-quality form in which it is grown. The etching rate of the stopping layer can be controlled by the proportion of Al in that layer.

Dielectrically isolated semiconductor devices

Abstract: The invention is a method of fabricating dielectrically isolated semiconductor regions adapted for the construction of an integrated circuit on an epitaxial wafer wherein the epitaxial wafer has a first layer of monocrystalline n+ type silicon of a predetermined thickness and a second layer of epitaxially deposited n-type silicon which is substantially thinner than the first layer. A layer of silicon dioxide is grown on the back side of the first layer of the wafer and a layer of polycrystalline silicon is deposited onto the silicon dioxide layer. An aluminum oxide mask is formed defining a plurality of grooves around active semiconductor regions within the n-type silicon layer. The grooves are formed by a sputter etching process. Silicon dioxide is thermally grown within each of the grooves exposed by the sputter etching process to dielectrically isolate the active semiconductor regions after which semiconductor devices may be formed in each of the active semiconductor regions.

Observations on the formation and etching of platinum silicide

Abstract: When thin‐film platinum and single‐crystal silicon are interdiffused, [inverted lazy s] 100 A of SiO2 is found at the PtSi surface. The silica protects the silicide from attack by the aqua regia commonly used to remove unreacted Pt. If the silica is stripped, PtSi on Si will dissolve in aqua regia even faster than Pt. These findings are applicable to contact technology for silicon devices and integrated circuits.

Method for making semiconductor structure

Abstract: A semiconductor structure from which various types of active semiconductor devices can be formed is made of a semiconductor island on a transparent substrate, having thereon an electrically insulating layer of a protective material, such as silicon dioxide, which extends onto and covers the sides of the semiconductor island. The protective layer can either cover only the sides of the semiconductor island or extend over the top edge of the island. The protective layer is made by etching through a photoresist mask made of a negatively reacting photoresist which is formed by exposure to irradiation from beneath the uncovered surface of the substrate, whereby the thickness of the silicon island and the flux density of the irradiation are selected so that for a particular duration, the irradiation is completely attenuated by the semiconductor island.

Processes for multilevel metallization

Abstract: Film deposition and etching techniques for producing multilevel metallized structures on complex devices are reviewed. Emphasis is placed on process procedures for controlled contouring of topographic features induced during pattern etching, techniques for ensuring coverage by deposited films of topography introduced into the substrate, and dielectric deposition procedures that enhance breakdown strength and minimize pinholes. Broadly, the classes of processes discussed are the following: (i) metallization techniques that reduce susceptibility to electromigration and hillock formation and that ensure step coverage; (ii) dielectric deposition techniques that result in good step coverage, low stress, and low pinhole density; (iii) photolithographic and etching techniques that can taper steps generated in the films and that do not form pinholes.

A Chemical Etchant for the Selective Removal of GaAs Through SiO2 Masks

Abstract: An etchant has been developed for etching selected regions of through windows in an mask. This etchant has been found to provide fiat etching profiles across the unmasked regions of the GaAs, and has considerably reduced undercutting commonly caused by attack of the . The chemical etching rates have been evaluated and have been found to depend strongly on the concentration of the etching solution and on the crystal orientation of the . The utility of the for device preparation has been demonstrated by its application to the fabrication of interdigitated bipolar transistors with 5 μm base‐emitter separation.

Connecting modules for an etching system

Abstract: An etching system is disclosed, whereby individual and discrete modules are provided, each for performing its own function, with the modules being longitudinally connected in serial arrangement, and being aligned by suitable pin-in-hole arrangement, and with a common drive for all of the modules, by the use of drive rods carried by each of the modules that are coupled together with the connecton of adjacent modules. Individual features of the various drive means are also disclosed.

Fracture strength of soda-lime glass after etching

Abstract: The strength of soda-lime glass at liquid nitrogen temperature after various amounts of etching was measured. A median crack length of 6 μm was calculated from the results and a model of the etching process. It was found that the rate of etching at the crack tip was much lower than on the external surface. Measured distributions of strength for samples etched different depths were also in reasonable agreement with calculated distributions. The etching process itself was found to cause some weakening of the glass.

Method for fabricating glass-backed transducers and glass-backed structures

Abstract: A glass or other dielectric backed transducer structure is formed by utilizing a series of processes including at least one electrostatic bond. The processes enable one to bond a semiconductor wafer to a dielectric as a glass wafer. Then by selectively removing certain conductively semiconductor, one obtains a "thin ribbon" piezoresistive bridge secured to a thin glass wafer. The resultant structure is entirely unanticipated by the prior art. A glass part is also formed by electrostatically bonding a glass wafer to a semiconductor wafer, polishing the glass to a desired depth, masking the polished glass layer according to a desired pattern representative of the glass part, etching away all the glass except the desired pattern, and thence removing all the semiconductor.

Selectively etched diffraction gratings in GaAs

Abstract: Selective etching techniques are described which have been utilized to fabricate V‐groove diffraction gratings with spatial frequencies greater than 4000 lines/mm in {100} surfaces of GaAs.

Method for packaging semiconductor devices

Abstract: An improved method of packaging semiconductor devices and dice which comprises coating a semiconductor wafer with a polyimide film, etching selected areas of the polyimide film from the surface of the wafer, separating the wafer into a plurality of semiconductor dice wherein each of the dice have electrical contacts to circuits within the device and making ohmic electrical connection with the electrical contacts on the dice.

Method for forming regions of predetermined thickness in silicon

Abstract: A method for forming thin regions of predetermined thickness in a silicon wafer which comprises the steps of applying an etchant resist mask on the faces of the wafer, opening a slot of predetermined width in the mask on one face to expose the underlying silicon, removing the mask from all areas of the other face where the thin regions are to be formed including removal opposite said slot, etching the wafer until the back surface of the thin region reaches the groove etched at the slot and then quenching the etch.

Electrolytic etching and electron mobility of GaAs for FET's

Abstract: An electrolytic etching technique for n-GaAs is presented. The procedure is applied to post-growth etching of FET wafers to achieve uniformly thin layers from excessively thick and nonuniform material. Measurements on a Hall sample, thinned by this technique, show mobilities in good agreement with theoretical bulk mobility calculations for films as thin as 2100 A. From Hall measurements on layers covered by the anodic native oxide, it is determined that the oxide interface traps 3·9 × 1011 electrons per cm2 more charge than the as-grown surface.

Josephson tunneling through locally thinned silicon wafers

Abstract: We have made and tested Josephson junctions in which tunneling takes place through a locally thinned region in a single‐crystal silicon wafer. An etching technique is used to produce a square uniform thinned layer, 87.5 μm on a side and ≈400 A thick. After removal of the oxide layer, superconducting metals are deposited on both sides. Temperature and magnetic field dependences of the critical current, as well as the magnitude of the current, conform very closely to the theory for a Josephson tunnel junction. This is the first type of Josephson junction employing a barrier which is accessible for modification prior to deposition of the superconducting electrodes.

Sputter-etching method employing fluorohalogenohydrocarbon etching gas and a planar electrode for a glow discharge

Abstract: On sputter-etching a substrate, fluorochloro- or fluorobromohydrocarbon gas is used as an etching gas in a chamber evacuated to a pressure of at least as low as 10.sup. -5 Torr. The etching gas is introduced at a pressure between 5 × 10.sup. -3 and 5 × 10.sup. -2 Torr. Use is also made of a planar electrode for supporting the substrate and responsive to an r.f. power supplied thereto for producing a glow discharge.