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Showing papers on "Gate driver published in 2008"


Patent
Hiroshi Takahara1, Hitoshi Tsuge1
06 Mar 2008
TL;DR: In this paper, the video signal voltage is applied to the drive transistor to perform a predetermined operation, and written into the first capacitor, which is used to perform an offset cancel operation.
Abstract: An EL display device includes: a source driver circuit to output a video signal voltage; a gate driver circuit to select a pixel in a display screen; a first capacitor to maintain the video signal voltage; and a drive transistor to supply current to an EL element of a pixel. The video signal voltage is applied to the drive transistor to perform a predetermined operation, and written into the first capacitor. The video signal voltage maintained in the first capacitor is used to perform an offset cancel operation.

223 citations


Patent
24 Jan 2008
TL;DR: In this article, a power conversion apparatus includes a separate gate drive unit which has gate drivers connected to respective switches and interface circuits and does not need a dedicated power supply for each gate drive circuit.
Abstract: PROBLEM TO BE SOLVED: To achieve power supply to each gate drive circuit without using a separate dedicated power supply for each gate drive circuit. SOLUTION: A power conversion apparatus includes a separate gate drive unit which has gate drivers connected to respective switches and interface circuits and does not need a dedicated power supply, and a power conversion apparatus gate drive having common power supplys which supply power to the gate drive unit. Through one or a plurality of power supply terminals disposed on each interface circuit, power can be supplied from the common power supplys less in number than the switches or from a main circuit. Insulation is secured for a signal from a signal source to a gate driver to enable signal transmission. COPYRIGHT: (C)2009,JPO&INPIT

197 citations


Patent
22 Feb 2008
TL;DR: In this article, a motor controller comprises a processor selectively outputting an on-signal to either one of an upper arm switching element and a lower arm switching elements based upon a detected position by the position sensor.
Abstract: A motor controller comprises a processor selectively outputting an on-signal to either one of an upper arm switching element and a lower arm switching element based upon a detected position by the position sensor, gate drivers inputting a driving voltage to the gates of the switching elements by shifting a level of the on-signal from the processor to the upper arm switching element and a bootstrap capacitor configured to be charged while the upper arm switching element is turned off and to behave as a voltage supply for the gate driver while the upper arm switching element is turned on. The processor is configured to reduce a set duty ratio when the set duty ratio is equal to or larger than a predetermined value (e.g. 80 percents) and a rotational position of the motor does not change for a first predetermined time. This motor controller can prevent the switching element from a burnout even if the motor is locked.

188 citations


Patent
Chae Wook Lim1
05 Jun 2008
TL;DR: In this paper, a liquid crystal display device and a method for driving the same was described for reducing a compensating deviation of a common voltage, and a data driver for driving data lines of the liquid-crystal display panel, a gate driver and a voltage compensating unit for generating a plurality of compensating signals for compensating respective distortions of common voltages.
Abstract: A liquid crystal display device and method for driving the same is described for reducing a compensating deviation of a common voltage. The liquid crystal display device includes a liquid crystal display panel; a data driver for driving data lines of the liquid crystal display panel; a gate driver for driving gate lines of the liquid crystal display panel; and a common voltage compensating unit for generating a plurality of compensating signals for compensating respective distortions of common voltages at a plurality of common regions of a common electrode of the liquid crystal display panel by using common voltages fed back from the common regions, and supplying compensating signals corresponding to each of the plurality of common regions.

173 citations


Proceedings ArticleDOI
15 Jun 2008
TL;DR: In this paper, a new dc-dc converter suitable for operation at very high frequencies under on-off control is introduced, where the converter power stage is based on a resonant inverter (the Phi2 inverter) providing low switch voltage stress and fast settling time.
Abstract: This paper introduces a new dc-dc converter suitable for operation at very high frequencies under on-off control. The converter power stage is based on a resonant inverter (the Phi2 inverter) providing low switch voltage stress and fast settling time. A new multi-stage resonant gate driver suited for driving large, high-voltage rf MOSFETS at VHF frequencies is also introduced. Experimental results are presented from a prototype dc-dc converter operating at 30 MHz at input voltages up to 200 V and power levels above 200 W. These results demonstrate the high performance achievable with the proposed design.

149 citations


Patent
29 Jul 2008
TL;DR: In this paper, a cascode current sensor includes a main and sense MOSFETs, and the drain voltages are equalized by using a variable current source and negative feedback.
Abstract: A cascode current sensor includes a main MOSFET and a sense MOSFET. The drain terminal of the main MOSFET is connected to a power device whose current is to be monitored, and the source and gate terminals of the main MOSFET are connected to the source and gate terminals, respectively, of the sense MOSFET. The drain voltages of the main and sense MOSFETs are equalized, in one embodiment by using a variable current source and negative feedback. The gate width of the main MOSFET is typically larger than the gate width of the sense MOSFET. Using the size ratio of the gate widths, the current in the main MOSFET is measured by sensing the magnitude of the current in the sense MOSFET. Inserting the relatively large MOSFET in the power circuit minimizes power loss.

137 citations


Journal ArticleDOI
Petar J. Grbovic1
TL;DR: In this article, a new IGBT gate driver based on feed-forward control of the gate emitter voltage is presented, which provides robust and simple control and optimization of the reverse recovery current and turn on losses.
Abstract: This paper addresses the problem of turn on performances of an insulated gate bipolar transistor (IGBT) that works in hard switching conditions. The IGBT turn on dynamics with an inductive load is described, and corresponding IGBT turn on losses and reverse recovery current of the associated freewheeling diode are analysed. A new IGBT gate driver based on feed-forward control of the gate emitter voltage is presented in the paper. In contrast to the widely used conventional gate drivers, which have no capability for switching dynamics optimisation, the proposed gate driver provides robust and simple control and optimization of the reverse recovery current and turn on losses. The collector current slope and reverse recovery current are controlled by means of the gate emitter voltage control in feed-forward manner. In addition the collector emitter voltage slope is controlled during the voltage falling phase by means of inherent increase of the gate current. Therefore, the collector emitter voltage tail and the total turn on losses are significantly reduced. The proposed gate driver was experimentally verified and compared to a conventional gate driver, and the results are presented and discussed in the paper.

130 citations


Journal ArticleDOI
TL;DR: In this paper, a new current source gate drive circuit is proposed for power MOSFETs, which achieves quick turn on and turn off transition times to reduce switching loss and conduction loss.
Abstract: In this paper, a new current source gate drive circuit is proposed for power MOSFETs. The proposed circuit achieves quick turn on and turn off transition times to reduce switching loss and conduction loss in power MOSFETs. In addition, it can recover a portion of the CV gate energy normally dissipated in a conventional driver. The circuit consists of four controlled switches and a small inductor (typically 100 nH or less). The current through the inductor is discontinuous in order to minimize circulating current conduction loss. This also allows the driver to operate effectively over a wide range of duty cycles with constant peak current-a significant advantage for many applications since turn on and turn off times do not vary with the operating point. Experimental results are presented for the proposed driver operating in a boost converter at 1 MHz, 5 V input, 10 V/5 A output. At 5 V gate drive, a 2.9% efficiency improvement is achieved representing a loss savings of 24.8% in comparison to a conventional driver.

127 citations


Journal ArticleDOI
TL;DR: In this paper, an active gate control of paralleled IGBT modules is explained in detail and adapted to a solid-state modulator, achieving a low-inductance IGBT current measurement, the control unit implementation with a field-programmable gate array and a digital signal processor.
Abstract: In modern pulsed power systems, often, fast solid-state switches like MOSFETs and insulated gate bipolar transistor (IGBT) modules are used to generate short high power pulses. In order to increase the pulsed power, solid-state switches have to be connected in series or in parallel. Depending on the interconnection of the switches, parameter variations in the switches and in the system can lead to an unbalanced voltage or current. Therefore, the switches are generally derated, which results in an increased number of required devices, cost, and volume. With an active gate control, derating and preselection of the switching devices can be avoided. In this paper, an active gate control of paralleled IGBT modules, which has been developed for converters with inductive load, is explained in detail and adapted to a solid-state modulator. This paper focuses on achieving a low-inductance IGBT current measurement, the control unit implementation with a field-programmable gate array and a digital signal processor, as well as the balancing of the pulse currents.

121 citations


Patent
Se-Hoon Lee1
11 Jan 2008
TL;DR: In this paper, a liquid crystal display device includes a timing controller generating a voltage compensation control pulse and a gate control signal, a gate driver sequentially supplying the gate-on voltage to the plurality of gate lines in response to the voltage compensation signal.
Abstract: A liquid crystal display device includes a timing controller generating a voltage compensation control pulse and a gate control signal, a voltage compensation signal generator generating a voltage compensation signal, the voltage level of which is gradually reduced during one frame period, in response to the voltage compensation control pulse, a power unit outputting a gate-on voltage to a plurality of gate lines by gradually increasing the level of the gate-on voltage in response to the voltage compensation signal, and a gate driver sequentially supplying the gate-on voltage to the plurality of gate lines in response to the gate control signal.

111 citations


Journal ArticleDOI
TL;DR: In this article, a low-cost DC-DC converter was proposed for connecting the three voltage nets, which minimizes the number of switches and their associated gate driver components by using two half-bridges and a high-frequency transformer.
Abstract: Electrical power systems in future hybrid and fuel cell vehicles may employ three voltage [14 V, 42 V, and high voltage (HV)] nets. These will be necessary to accommodate existing 14-V loads as well as efficiently handle new heavy loads at the 42-V net and a traction drive on the HV bus. A low-cost DC-DC converter was proposed for connecting the three voltage nets. It minimizes the number of switches and their associated gate driver components by using two half-bridges and a high-frequency transformer. Another salient feature is that the half bridge on the 42-V bus is also utilized to provide the 14-V bus by operating at duty ratios around an atypical value of 1/3. Moreover, it makes use of the parasitic capacitance of the switches and the transformer leakage inductance for soft switching. The use of half bridges makes the topology well suited for interleaved multiphase modular configurations as a means to increase the power level because the capacitor legs can be shared. This paper presents simulation and experimental results on an interleaved two-phase arrangement rated at 4.5 kW. Also discussed are the benefits of operating with an atypical duty ratio on the transformer and a preferred multiphase configuration to minimize capacitor ripple currents.

Journal ArticleDOI
TL;DR: An analysis, design procedure and simulation results are presented for the proposed resonant gate drive circuit, which achieves quick turn-on and turn-off transition times to reduce switching loss and conduction loss in power MOSFETS.
Abstract: In this paper, a new resonant gate-drive circuit is proposed to recover a portion of the power-MOSFET-gate energy that is typically dissipated in high-frequency converters. The proposed circuit consists of four control switches and a small resonant inductance. The current through the resonant inductance is discontinuous in order to minimize circulating-current conduction loss that is present in other methods. The proposed circuit also achieves quick turn-on and turn-off transition times to reduce switching and conduction losses in power MOSFETs. An analysis, a design procedure, and experimental results are presented for the proposed circuit. Experimental results demonstrate that the proposed driver can recover 51% of the gate energy at 5-V gate-drive voltage.

Patent
24 Jan 2008
TL;DR: In this article, a logic gate is constructed of an insulated gate field effect transistor (MIS transistor) having a thin gate insulation film for switching the supply and stop of an operation power source voltage.
Abstract: A logic gate is constructed of an insulated gate field effect transistor (MIS transistor) having a thin gate insulation film. An operation power supply line to the logic gate is provided with an MIS transistor having a thick gate insulation film for switching the supply and stop of an operation power source voltage. A voltage of the gate of the power source switching transistor is made changing in an amplitude greater than an amplitude of an input and an output signal to the logic gate. Current consumption in a semiconductor device configured of MIS transistor of a thin gate insulation film can be reduced and an power source voltage thereof can be stabilized.

Patent
03 Jan 2008
TL;DR: An LCD device and a driving method for reducing power consumption by decreasing alternating numbers of common voltages was provided in this article. But the gate and source drivers were not specified, and the timing controller was not specified.
Abstract: An LCD device and a driving method thereof are provided to reduce power consumption by decreasing alternating numbers of common voltages An LCD(Liquid Crystal Display) device includes a liquid crystal panel(100), gate and source drivers(110,120), and a timing controller(130) The liquid crystal panel includes plural pixels forming a frame having even and odd frame parts The gate driver supplies first and second scan signals to gate lines of the even and odd frame parts The source driver supplies data voltage to data lines of the even and odd frame parts in response to the first and second scan signals respectively and controls the even and odd frame parts so as to have opposite polarities to each other The timing controller controls the driving timing of the gate and source drivers

Journal ArticleDOI
TL;DR: In this paper, a new accurate analytical loss model of the power metal oxide semiconductor field effect transistor driven by a current-source resonant gate driver is developed, and a general method to optimize the new resonant driver is proposed and employed in the development of a 12 V synchronous buck voltage regulator (VR) prototype at 1 MHz switching frequency.
Abstract: In this paper, the advantages of a new resonant driver are verified thoroughly by the analytical analysis, simulation and experimental results. A new accurate analytical loss model of the power metal oxide semiconductor field effect transistor driven by a current-source resonant gate driver is developed. Closed-formed analytical equations are derived to investigate the switching characteristics due to the parasitic inductance. The modeling and simulation results prove that compared to a voltage driver, a current-source resonant driver significantly reduces the propagation impact of the common source inductance during the switching transition at high (>1 MHz) switching frequency, which leads to a significant reduction of the switching transition time and the switching loss. Based on the proposed loss model, a general method to optimize the new resonant driver is proposed and employed in the development of a 12 V synchronous buck voltage regulator (VR) prototype at 1 MHz switching frequency. The level-shift circuit and digital implementation of complex programmable logic device (CPLD) are also presented. The analytical modeling matches the simulation results and experimental results well. Through the optimal design, a significant efficiency improvement is achieved. At 1.5 V output, the resonant driver improves the VR efficiency from 82.7% using a conventional driver to 86.6% at 20 A, and from 76.9% using a conventional driver to 83.6% at 30 A. More importantly, compared with other state of the art VR approaches, the new resonant driver is promising from the standpoints of both performance and cost-effectiveness.

Patent
30 Apr 2008
TL;DR: In this article, a feedback circuit is used to correct the magnitude of current supplied by the gate driver to the gate of the power MOSFET in the low-current condition.
Abstract: A gate driver for a power MOSFET in, for example, a DC-DC converter switches the MOSFET between a fully-on condition and a low-current condition instead of switching the MOSFET between fully-on and fully-off conditions. The amount of charge that must be transferred to charge and discharge the gate of the MOSFET is thereby reduced, and the efficiency of the MOSFET is improved. A feedback circuit may be used to assure that the magnitude of current in the power MOSFET in its low-current condition is correct. Alternatively, a trimming process may be used to correct the magnitude of the voltage supplied by the gate driver to the gate of the power MOSFET in the low-current condition.

Journal ArticleDOI
TL;DR: The improved driver using integrated inductors is presented with multiphase buck voltage regulators (VRs) to reduce the number of magnetic cores and the core loss and the experimental results prove that a significant efficiency improvement has been achieved.
Abstract: This paper proposes a new current-source gate drive circuit for a synchronous buck converter. The proposed driver can drive two MOSFETs independently with different drive currents for optimal design. For the control MOSFET, the optimal design involves a tradeoff between switching loss reduction and drive circuit loss; while for the synchronous-rectifier MOSFET, the optimal design involves a tradeoff between body diode conduction loss and drive circuit loss. Furthermore, the new drive circuit can achieve: 1) significant switching loss reduction; 2) gate energy recovery and high gate drive voltage to reduce R DS(ON) conduction losses; 3) reduced conduction loss and reverse recovery loss of the body diode; and 4) zero-voltage switching of all the drive switches. The improved driver using integrated inductors is presented with multiphase buck voltage regulators (VRs) to reduce the number of magnetic cores and the core loss. The experimental results prove that a significant efficiency improvement has been achieved. At 1.5-V output, the new driver improves the efficiency from 84% using a conventional driver to 87.3% at 20 A, and at 30 A, from 79.4% to 82.8%. Overall, the new driver approach is attractive from the standpoints of both performance and cost-effectiveness.

Proceedings ArticleDOI
Baoxing Chen1
15 Jun 2008
TL;DR: In this paper, an isolated half-bridge gate driver with an integrated DC/DC converter providing an isolated high-side supply at 15 V, all in a 16 L SOIC package.
Abstract: Half-bridge gate drivers have been widely used in a variety of applications, such as motor drives, power supplies, and plasma display panels. However, they are difficult to use because of the need for isolation and the need to provide isolated power supply for high-side gate drive. Here I will describe an isolated half-bridge gate driver with an integrated DC/DC converter providing an isolated high-side supply at 15 V, all in a 16 L SOIC package. Coreless micro-transformers are not only used for transmitting gate drive signals from input to isolated outputs, but also used for delivering power to the isolated high-side supply. The gate drive signals are encoded before they are sent to the signal transformers, and then decoded to reproduce the gate drive output signals. The power transformers are switched resonantly at 160 MHz to achieve efficient energy transfer. Both the transformer switches and Schottky diodes used for high frequency rectification are implemented on chip. As much as 5 kV isolation is achieved through 20 mum thick polyimide layers sandwiched in between the primary coils and the secondary coils. Both gate drive outputs can provide 0.3 A sinking and 0.1 A sourcing up to 10 Mbps. The converter for the high side supply is measured to deliver 15 mA at 15 V with 25% efficiency. An example application of the half-bridge gate drivers in an isolated AC-DC power supply will be discussed.

Journal ArticleDOI
TL;DR: In this paper, a dual-channel low-side resonant gate drive circuit is proposed to provide two symmetrical drive signals for driving two MOSFETs in push-pull converters.
Abstract: At high-frequency applications, the gate drive loss of the power metal oxide semiconductor field-effect transistor (MOSFET) becomes quite significant. A new dual-channel low side resonant gate drive circuit is proposed in this paper. The proposed drive circuit can provide two symmetrical drive signals for driving two MOSFETs. It charges and discharges the MOSFET gate capacitor with a constant current source. Both gate drive loss and, more importantly, switching loss can be reduced significantly. The proposed resonant gate drive circuit can be used to drive the synchronous MOSFETs in a current doubler or full-wave rectifier configuration. It can also be used to drive the primary MOSFETs in push-pull converters. Analysis, computer simulation, and experimental results show that significant power loss reduction is achieved by the proposed circuit.

Patent
24 Jun 2008
TL;DR: In this article, the variance of switching speeds attributed to the variances of threshold voltages and mirror voltages in a plurality of switching devices which are driven by the gate drive apparatus can be suppressed.
Abstract: A gate drive apparatus including a constant-current-pulse gate drive circuit which creates a gate signal for a switching device as a constant-current output, a constant-voltage-pulse gate drive circuit which creates the gate signal as a constant-voltage output, and a decision/switch circuit which switches the operation of the constant-current-pulse gate drive circuit and the operation of the constant-voltage-pulse gate drive circuit. The variance of switching speeds attributed to the variances of threshold voltages and mirror voltages in a plurality of switching devices which are driven by the gate drive apparatus can be suppressed, and the variance of losses can be minimized.

Proceedings ArticleDOI
18 May 2008
TL;DR: In this paper, the authors demonstrate a fully functional high voltage and high current IGBT module rated at 3300 V consisting solely of reverse conducting (RC) IGBT chips, designed in accordance with the latest Enhanced Planar and Soft Punch Through technology while incorporating an integrated freewheeling diode.
Abstract: In this paper we demonstrate a fully functional high voltage and high current IGBT module rated at 3300 V consisting solely of reverse conducting (RC) IGBT chips. The RC- IGBTs were designed in accordance with the latest Enhanced Planar and Soft Punch Through technology while incorporating an integrated freewheeling diode in the same silicon volume. Future high power IGBT modules with RC-IGBT technology will be capable of providing exceptional electrical performance for the given voltage class in terms of the maximum allowable output current capability.

Patent
19 Nov 2008
TL;DR: In this paper, a motor controller of an air conditioner, including a converter for converting a commercial AC power into a DC power, an inverter including a plurality of switching elements, the inverter receiving the AC power, converting the DC power into an AC power through a switching operation and driving a three-phase motor, a gate driver for controlling the switching operation of the switching elements.
Abstract: The present invention relates to a motor controller of an air conditioner, including a converter for converting a commercial AC power into a DC power, an inverter including a plurality of switching elements, the inverter receiving the DC power, converting the DC power into an AC power through a switching operation and driving a three-phase motor, a gate driver for controlling the switching operation of the switching elements, and a plurality of voltage drop units connected between the converter and the gate driver, the voltage drop units dropping the DC power and supplying driving voltages for an operation of the switching elements. Accordingly, circuit elements within a controller can be protected.

Proceedings ArticleDOI
15 Jun 2008
TL;DR: In this article, an airborne high temperature inverter with a 200C cooling source and 4 kVA power is described. Butler et al. describe the laboratory step-by-step work towards a prototype and operate under full load (15A) using high precision shunt and voltage probes.
Abstract: SiC devices enable for high temperature operation of power converters. The paper describes the laboratory step by step work towards an airborne high temperature inverter : 200C cooling source, 4 kVA power. From 'JFET only' to 'full three phase power stage' tested up to 250C, including capacitor. Device samples are characterized in order to set the requirements for the gate driver and to evaluate maximum switchable power. Switching losses are measured using high precision shunt and voltage probes. A prototype is built and operation under full load (15A) is verified.

Patent
07 Jan 2008
TL;DR: In this paper, a liquid crystal display (LCD) for eliminating an afterimage includes a power supply, a gate driver and a discharger, which detects the cutting off of external power voltage and supplies a discharge signal.
Abstract: A liquid crystal display (“LCD”) for eliminating an afterimage includes a power supply, a gate driver and a discharger. The power supply detects the cutting off of external power voltage and supplies a discharge signal. The gate driver simultaneously supplies a gate driving signal to a plurality of gate lines in response to the discharge signal, and the discharger supplies a common voltage to a plurality of data lines in response to the discharge signal.

Journal ArticleDOI
TL;DR: In this article, a simple and cost effective solution to supply high side power electronic switch gate drivers is presented, which can be integrated and it is demonstrated that it can be loss free, depending on how the power switch is driven.
Abstract: The paper presents a simple and cost effective solution to supply high side power electronic switch gate drivers. The solution can be integrated and it is demonstrated that it can be loss free, depending on how the power switch is driven. The solution is based on a pulsed linear regulator, only sensitive to a positive dv/dt. At every main power switch's turn OFF, it recycles the switching losses in order to recharge a storage capacitor. The paper presents the global operation and focuses on interesting and important operating characteristics thanks to simulation and practical results.

Proceedings ArticleDOI
16 May 2008
TL;DR: In this paper, the authors proposed a smart gate drive with self-diagnosis for power MOSFETs and IGBTs based on monitoring of the gate charge and discharge currents.
Abstract: This paper proposes a useful smart gate drive with self-diagnosis for power MOSFETs and IGBTs. This new method is based on monitoring of the gate charge and discharge currents. Two gate current monitoring circuits are proposed and validated with experimental results. The implemented smart functions include self-acknowledgement, gate drive connection verification, power device status diagnosis, gate dielectric wearout detection and prediction. The proposed method can detect abnormal conditions that occur either within the gate drive circuit itself or in the driven power device. It also features simple and low cost implementation and can be easily integrated into gate drive circuits or gate drive chips.

Proceedings ArticleDOI
01 Nov 2008
TL;DR: In this article, different gate drive topologies for SiC JFETs with respect to high temperature operation capability, limitations, dynamic performance and circuit complexity are discussed, and an experimental performance comparison of edge-triggered and phase-difference HT drivers with a conventional room temperature jFET gate driver is given.
Abstract: Volume and weight limitations for components in hybrid electrical vehicle (HEV) propulsion systems demand highly-compact and highly-efficient power electronics The application of silicon carbide (SiC) semiconductor technology in conjunction with high temperature (HT) operation allows the power density of the DC-DC converters and inverters to be increased Elevated ambient temperatures of above 200degC also affects the gate drives attached to the power semiconductors This paper focuses on the selection of HT components and discusses different gate drive topologies for SiC JFETs with respect to HT operation capability, limitations, dynamic performance and circuit complexity An experimental performance comparison of edge-triggered and phase-difference HT drivers with a conventional room temperature JFET gate driver is given The proposed edge-triggered gate driver offers high switching speeds and a cost effective implementation Switching tests at 200degC approve an excellent performance at high temperature and a low temperature drift of the driver output voltage

Patent
10 Dec 2008
TL;DR: In this paper, a driver circuit comprising an insulated gate bipolar transistor having a collector coupled to a voltage supply, an emitter coupled to the source of reference potential, and a gate configured to receive a control signal from the driver circuit is described.
Abstract: A driver circuit comprising an insulated gate bipolar transistor having a collector coupled to a voltage supply, an emitter coupled to a source of reference potential, and a gate configured to receive a control signal from a driver circuit, and a desaturation circuit conductively coupled between an insulated gate and a collector of the insulated gate bipolar transistor to desaturate the insulated gate. The desaturation circuit includes a series coupled bias voltage source, uni-directionally conducting element and switch.

Patent
31 Jan 2008
TL;DR: In this paper, the authors present a solution to attain a plurality of kinds of shift methods such as a switching function of scanning gate lines in an image display apparatus with a built-in a-Si gate driver circuit.
Abstract: PROBLEM TO BE SOLVED: To attain a plurality of kinds of shift methods such as a switching function of scanning gate lines in an image display apparatus with a built-in a-Si gate driver circuit. SOLUTION: A first gate driver circuit 2 can bring each gate pulse output stage into a high-impedance state by an external signal DIR and scans each gate line in a single direction. A second gate driver circuit 3 can bring each gate pulse output stage into a high-impedance state by the external signal DIR and scans each gate line in a single direction, but differs from the first gate driver circuit 2 in the scanning direction. When one of the first and second gate driver circuits 2, 3 operates by the control of the external signal DIR, each gate pulse output stage of the other gate driver circuit is in the high impedance state. COPYRIGHT: (C)2008,JPO&INPIT

Patent
05 May 2008
TL;DR: In this article, a system and method for adaptively altering a power supply's dead time is presented, which comprises detecting a start of a dead time, detecting an ending condition of the dead time and ending the dead times.
Abstract: System and method for adaptively altering a power supply's dead time. A method comprises detecting a start of a dead time, detecting an ending condition of the dead time, and ending the dead time. The detecting of the ending condition is based on a first current flowing through a lower portion of the power supply or a second current flowing through a gate driver of a lower switching element in the power supply.