Showing papers on "Photomask published in 2016"

Method for manufacturing liquid crystal display panel

Abstract: The invention provides a method for manufacturing a liquid crystal display panel. Based on the COA technique, a spacer and a black matrix are integrated on the same material and assembled on the side with a TFT array substrate by means of a multi-section adjustment photomask through a photolithography process, production period is shortened, production cost is reduced, and product competitiveness is improved; besides, the area, corresponding to the black matrix, on a color filter film is designed to be a groove, the black matrix formed afterwards stretches into the groove, so that barriers between adjacent sub-pixels are reduced, and uniform diffusion of liquid crystals in the panel can be achieved.

Mitigation of mask three-dimensional induced phase effects by absorber optimization in ArFi and extreme ultraviolet lithography

Abstract: We will summarize our work on mask topography-induced effects over the last 5 years. We will give a full physical explanation of the effects that can be observed from exposed wafers in state-of-the-art immersion and extreme ultraviolet photolithography. The mask topography-induced phase leads to vertical and lateral displacements of the aerial image, resulting in feature-dependent best focus and position. The feature dependency has been studied for gratings through pitch and size and for two-trench arrangements. The physical explanation involves the analysis and quantification of phase effects in a similar way as was done for projection lens aberrations one decade ago. Phase effects, derived both from rigorous simulations and an analytical model, will be compared with exposure figure or merits (e.g., best focus per feature) and correlate well. Therefore, the analysis of mask topography induced phase and the reduction thereof by absorber thickness optimization can be used to drive lithography improvements.

Mask-induced best-focus shifts in deep ultraviolet and extreme ultraviolet lithography

Abstract: The mask plays a significant role as an active optical element in lithography, for both deep ultraviolet (DUV) and extreme ultraviolet (EUV) lithography. Mask-induced and feature-dependent shifts of the best-focus position and other aberration-like effects were reported both for DUV immersion and for EUV lithography. We employ rigorous computation of light diffraction from lithographic masks in combination with aerial image simulation to study the root causes of these effects and their dependencies from mask and optical system parameters. Special emphasis is put on the comparison of transmission masks for DUV lithography and reflective masks for EUV lithography, respectively. Several strategies to compensate the mask-induced phase effects are discussed.

Sub-10 nm feature chromium photomasks for contact lithography patterning of square metal ring arrays.

Abstract: Advances in photolithographic processes have allowed semiconductor industries to manufacture smaller and denser chips. As the feature size of integrated circuits becomes smaller, there has been a growing need for a photomask embedded with ever narrower patterns. However, it is challenging for electron beam lithography to obtain <10 nm linewidths with wafer scale uniformity and a necessary speed. Here, we introduce a photolithography-based, cost-effective mask fabrication method based on atomic layer deposition and overhang structures for sacrificial layers. Using this method, we obtained sub-10 nm square ring arrays of side length 50 μm, and periodicity 100 μm on chromium film, on 1 cm by 1 cm quartz substrate. These patterns were then used as a contact-lithography photomask using 365 nm I-line, to generate metal ring arrays on silicon substrate.

Production method of flexible liquid crystal display panel

Abstract: The invention discloses a production method of a flexible liquid crystal display panel. Ultraviolet light is used to irradiate a liquid crystal box from a CF substrate, a color filter film of the CF substrate is utilized as a photomask, as a plurality of filter units which are formed on the color filter film corresponding to a plurality of sub-pixel areas have a shielding function to the ultraviolet light, under the irradiation of the ultraviolet light, reactive monomers mixed in liquid crystal materials correspondingly form a polymer wall in an area between a TFT (Thin Film Transistor) substrate and the CF substrate except for the plurality of sub-pixel areas, the polymer wall can surround liquid crystal molecules to prevent liquid crystal from flowing when the liquid crystal display panel is bent, so that the liquid crystal display panel can be maintained at a more uniform box thickness when being bent, the use of an additional photomask is saved, the production method is simple, and the production cost is low.

High resolution photomask or reticle and its method of fabrication

Abstract: Approaches for fabricating a lithographic mask are described. In an example, a lithographic mask for patterning semiconductor circuits includes a substrate. An in-die region is disposed on the substrate. The in-die region includes a patterned shifter material in direct contact with the substrate. The patterned shifter material includes features having sidewalls. A frame region is disposed on the substrate and surrounding the in-die region. The frame region includes an absorber layer in direct contact with the substrate.

A low-cost method of fabricating hybrid micro-nano fluidic chip by double-layer PDMS mold and UV–thermal nanoimprinting

Abstract: Micro-nano fluidic chips have become important tools in biomedical testing and research, their more frequent and diverse application being hampered mainly by their high cost, reflective of complex and expensive production methods. Our study introduces a simple, cost-effective new procedure whereby a sturdy PDMS mold consisting of two layers of poured PDMS with a photomask film bonded between them is used for replicating a hybrid micro-nano structure on a SU-8 substrate. The bottom surface of the mold receives a pattern of nano-ridges by pouring the first layer of PDMS on a 2D silicon nano-mold obtained by plasma etching after inclined Cu deposition. Using the double-layer PDMS mold, nano-channels can be imprinted with micro-channels cross-linked through the photomask in a single step of UV–thermal imprinting. The advantages of our end product, a chip with 205-μm-wide and 10-μm-deep micro-channels, cross-linked with 158-nm-wide and 90-nm-deep nano-channels, are its high precision and low cost.

UV‐curable positive photoresists for screen printing plate

Abstract: One of the most interesting application areas of screen printing is the production of microelectronic devices. Although negative photoresists are commonly used for the screen printing plate, their resolution limit is about 30 µm. A higher resolution of resist patterns on the screen plate is essential for microelectronic device applications. This paper describes the novel design of a UV-curable positive photoresist and its application to the screen printing plate. Positive patterns on the screen plate were obtained by conventional photolithography using a photomask and 365 nm light and the patterns were exposed to 254 nm light to enhance the mechanical strength of the resist patterns. It was essential to use photoacid generators sensitive to 365 nm and photoradical generators sensitive to 254 nm. A screen printing plate, which enabled the formation of 6 µm wide conductive lines, was developed. © 2016 Society of Chemical Industry

Process improvements in the production of silicon immersion gratings

Abstract: We have explored a number of lithographic techniques and improvements to produce the resist lines that then define the grating groove edges of silicon immersion gratings. In addition to our lithographic process using contact printing with photomasks, which is our primary technique for the production of immersion gratings, we explored two alternative fabrication methods, direct-write electron beam and photo-lithography. We have investigated the application of antireflection (AR) coatings during our contact printing lithography method to reduce the effect of Fizeau fringes produced by the contact of the photomask on the photoresist surface. This AR coating reduces the amplitude of the periodic errors by a factor of 1.5. Electron beam (e-beam) patterning allows us to manufacture gratings that can be used in first order, with groove spacing down to 0.5 micrometer or smaller (2,000 grooves/mm), but could require significant e-beam write times of up to one week to pattern a full-sized grating. The University of Texas at Austin silicon diffractive optics group is working with Jet Propulsion Laboratory to develop an alternate e-beam method that employs chromium liftoff to reduce the write time by a factor of 10. We are working with the National Institute of Standards and Technology using laser writing to explore the possibility of creating very high quality gratings without the errors introduced during the contact-printing step. Both e-beam and laser patterning bypass the contact photolithography step and directly write the lines in photoresist on our silicon substrates, but require increased cost, time, and process complexity.

A Rapid Prototyping Technique for Microfluidics with High Robustness and Flexibility.

Abstract: In microfluidic device prototyping, master fabrication by traditional photolithography is expensive and time-consuming, especially when the design requires being repeatedly modified to achieve a satisfactory performance. By introducing a high-performance/cost-ratio laser to the traditional soft lithography, this paper describes a flexible and rapid prototyping technique for microfluidics. An ultraviolet (UV) laser directly writes on the photoresist without a photomask, which is suitable for master fabrication. By eliminating the constraints of fixed patterns in the traditional photomask when the masters are made, this prototyping technique gives designers/researchers the convenience to revise or modify their designs iteratively. A device fabricated by this method is tested for particle separation and demonstrates good properties. This technique provides a flexible and rapid solution to fabricating microfluidic devices for non-professionals at relatively low cost.

TFT (Thin Film Transistor) substrate manufacturing method

Abstract: The invention relates to a TFT (Thin Film Transistor) substrate manufacturing method. The TFT substrate manufacturing method comprises steps: 10, a TFT gate pattern is formed on the substrate by using a first photomask; 20, an active layer pattern and a source drain electrode pattern are formed on the substrate by using a second photomask; 30, a passivation layer is deposited on the substrate, a photoresist is coated, a third photomask process is used for defining a pixel electrode pattern, etching and photoresist etching are carried out, and a pixel electrode is then deposited; and 40, through etching processing and direct photoresist stripping, the pixel electrode pattern is formed. The TFT substrate manufacturing method provides an effective stripping method for the ITO deposited on the PR (photoresist), the method can be used in a 3Mask TFT process, the process efficiency is greatly improved, the difficulty is reduced, and the 3Mask TFT process ability can be effectively enhanced.

Soft lithography of microfluidics channels using SU-8 mould on glass substrate for low cost fabrication

Abstract: Soft lithography describes the moulding of polymers using master templates, a technology that is widely used in microfluidics fabrication. This study outlines a quick and low cost soft lithography processing using negative photoresist (PR) SU-8 on glass substrate to create a master template for subsequent Polydimethylsiloxane (PDMS) replication in overall microfluidics fabrication. Two types of negative PR, SU-8 5 and SU-8 2015 are used in this study to increase the adhesion of the resist. Inkjet transparent mask is used as microfluidic photomask instead of expensive chrome mask and the design was made on AutoCAD software. Results from high power microscopy (HPM) and 3D profilometer show successful fabrication with <0.1 mm variance between the dimensions in the original design and the dimensions after the lithography process. The thickness and surface roughness of micro channels in SU-8 master template and PDMS replicate is ∼100 μm and ≤0.15 μm for both fabricates, respectively. SU-8 was chosen for master template for its superior properties and low cost fabrication with short processing time.

Exposure machine and photomask cleaning device

Abstract: The invention provides an exposure machine and a photomask cleaning device The photomask cleaning device is arranged in the exposure machine and used for cleaning a photomask in the exposure machine The photomask cleaning device comprises a box body, a moving table, an ion air gun and an ultraviolet lamp tube, wherein the box body is provided with a shutter; the moving table is arranged in the box body and used for receiving the photomask from the shutter and moving the photocover in the box body; the ion air gun is arranged in the box body and used for blowing out ionic wind to clean away impurities and dust on the photomask; and the ultraviolet lamp tube is arranged in the box body and used for emitting ultraviolet rays to decompose organic matters on the photomask According to the exposure machine and the photomask cleaning device therefor, the photomask can be cleaned in the exposure machine without the need for being cleaned outside the exposure machine, so that the working efficiency and the production capacity are greatly improved

Pellicle and photomask assembly including the same

Abstract: A pellicle includes a pellicle membrane, which includes a porous thin film. The porous thin film includes a plurality of nanowires, which are arranged across one another to form a net structure. A photomask assembly includes the pellicle and a photomask, wherein the pellicle is fixed to a surface of the photomask.

TFT array substrate and manufacturing method thereof

Abstract: The invention provides a TFT array substrate and a manufacturing method thereof The TFT array substrate etches a first metal oxide semiconductor layer into a first semiconductor pattern and a second semiconductor pattern through the same photomask process, and then doping is carried out Both ends of the first semiconductor pattern are respectively processed into a first conductor pattern and a second conductor pattern, wherein the first conductor pattern and the second conductor pattern are arranged at interval The second semiconductor pattern is processed into a common electrode The remaining first semiconductor pattern after processing is located above a bottom gate electrode According to the TFT array substrate manufacturing method provided by the invention, the number of times of photomask can be reduced; the production efficiency is improved; and the production cost is reduced

Defect inspecting method, sorting method, and producing method for photomask blank

Abstract: A method of inspecting a defect present at a surface portion of a photomask blank having at least one thin film formed on a substrate by use of the inspecting optical system. The method includes setting the distance between the defect and an objective lens of an inspecting optical system to a defocus distance, applying inspection light to the defect through the objective lens, collecting reflected light from the region irradiated with the inspection light, through the objective lens, as a magnified image, identifying a light intensity variation portion of the magnified image, and determining the rugged shape of the defect on the basis of a variation in light intensity of the light intensity variation portion of the magnified image.

Resolution enhancement using plasmonic metamask for wafer-scale photolithography in the far field.

Abstract: Resolution enhancement in far-field photolithography is demonstrated using a plasmonic metamask in the proximity regime, in which Fresnel diffraction is dominant. The transverse magnetic component of the diffracted wave from the photomask, which reduces the pattern visibility and lowers the resolution, was successfully controlled by coupling with the anti-symmetric mode of the excited surface plasmon. We obtained a consistently finely-patterned photoresist surface at a distance of up to 15 μm from the mask surface for 3-μm-pitch slits because of conserved field visibility when propagating from the near-field to the proximity regime. We confirmed that sharp edge patterning is indeed possible when using a wafer-scale photomask in the proximity photolithography regime. Our plasmonic metamask method produces cost savings for ultra-large-scale high-density display fabrication by maintaining longer photomask lifetimes and by allowing sufficient tolerance for the distance between the photomask and the photoresist.

Thin absorber extreme ultraviolet photomask based on Ni-TaN nanocomposite material.

Abstract: We study the use of random nanocomposite material as a photomask absorber layer for the next generation of extreme ultraviolet (EUV) lithography. By introducing nickel nanoparticles (NPs) randomly into a TaN host, the nanocomposite absorber layer can greatly reduce the reflectivity as compared with the standard TaN layer of the same thickness. Finite integral simulations show that the reduction in the reflectivity is mainly due to the enhanced absorption by the Ni NPs. The fluctuation in reflectivity induced by scattering and random position of the NPs is found to be on the order of 0.1%. Based on these observations, we build an effective medium model for the nanocomposite absorber layer and use the transfer matrix method to identify optimal absorber designs that utilize cavity effects to reduce the required volume fraction of Ni NPs. We further perform a process simulation and show that our approach can greatly reduce the HV bias in the lithography process.

The next generation of maskless lithography

Abstract: The essential goal for fast prototyping of microstructures is to reduce the cycle time. Conventional methods up to now consist of creating designs with a CAD software, then fabricating or purchasing a Photomask and finally using a mask aligner to transfer the pattern to the photoresist. The new Maskless Aligner (MLA) enables to expose the pattern directly without fabricating a mask, which results in a significantly shorter prototyping cycle. To achieve this short prototyping cycle, the MLA has been improved in many aspects compared to other direct write lithography solutions: exposure speed, user interface, ease of operation and flexibility.

AMOLED device and fabrication method thereof

Abstract: The invention provides an AMOLED (Active Matrix/Organic Light Emitting Diode) device and a fabrication method thereof. According to the fabrication method of the AMOLED device, the positive electrode of the AMOLED device is formed by adopting an ink-jet printing method; and compared with a conventional fabrication process, the fabrication method has the advantages that a photomask and a photoetching process are removed, so that the fabrication process of the AMOLED device is simplified and the production cost is reduced. According to the AMOLED device, the positive electrode of the AMOLED device is formed through the ink-jet printing method, so that the fabrication process is simple and the production cost is low.

Production method of array substrate and array substrate

Abstract: The invention provides a production method of an array substrate and an array substrate. According to the production method of the array substrate, which is provided by the invention, a passivation protection layer (90) made of an organic photoresist material is adopted to replace an existing passivation protection layer made of a silicon nitride material; a photomask is utilized to carry out exposure and development processing on the passivation protection layer (90) and a flat layer (70) to obtain a third via hole (91) positioned above a first drain electrode (62) and a fourth via hole (92) positioned above a second drain electrode (64). Compared with corresponding production processes in the prior art, not only is one photomask saved, but also one etching process is reduced, so that the aims of simplifying process flow and saving production cost are fulfilled. The array substrate provided by the invention is simple in structure and low in production cost, and has excellent electric properties.

Printability of buried extreme ultraviolet lithography photomask defects

Abstract: Native acting phase-programmed defects, otherwise known as buried program defects, with attributes very similar to native defects, were successfully fabricated using a high-accuracy overlay technique. The defect detectability and visibility were analyzed with conventional amplitude and phase-contrast blank inspection at 193-nm wavelength, pattern inspection at 193-nm wavelength, and scanning electron microscopy. The mask was also printed on wafer, and printability is discussed. Finally, the inspection sensitivity and wafer printability are compared, leading to the observation that the current blank- and pattern-inspection sensitivity is not enough to detect all of the printable defects.

Photomask blank, method for manufacturing photomask using the same, and method for manufacturing display device

Abstract: PROBLEM TO BE SOLVED: To provide a photomask blank giving such a photomask that a pattern cross-sectional profile is approximately perpendicular to the mask plane, which is suitable for achieving good transfer property or forming a minute pattern, and that fewer transfer defects are induced even when pattern transfer is carried out with high exposure light quantity (high dose amount), to provide a method for manufacturing a photomask having the above properties, and to provide a method for manufacturing a high-definition display device with a high yield.SOLUTION: The photomask blank has a light-shielding layer and a reflection-reducing layer, laminated on a transparent substrate. The light-shielding layer is composed of a plurality of stacked layers in such a manner that an etching rate increases stepwise or continuously from the light-shielding layer surface to the transparent substrate; and a lower layer portion formed on the substrate side of the light-shielding layer has an optical density of 1.0 or more at a wavelength of 436 nm. A photomask is manufactured by using the photomask blank. A display device is manufactured by using the photomask.SELECTED DRAWING: Figure 1

Layout structure of combined photomask as well as formation method and application method for layout structure

Abstract: The invention provides a layout structure of a combined photomask as well as a formation method and an application method for the layout structure. The layout structure of the combined photomask comprises a first layout and a second layout, wherein the first layout is provided with first line strips arranged in parallel at intervals; and the second layout is provided with second line strips arranged at intervals and perpendicular to the first line strips. With the adoption of the layout structure of the combined photomask, provided by the invention, rectangular holes and rectangular islands can be formed by changing a technological process. In addition, the layout structure of the combined photomask, adopted by the invention, is relatively simple in structure and has a relatively large photoetching process window, so that the resolution required for making high-density hole arrays or island arrays can be met.

Simultaneous AFM nano-patterning and imaging for photomask repair

Abstract: In this paper we present a new AFM based nano-patterning technique that can be used for fast defect repairing of high resolution photomasks and possibly other high-speed nano-patterning applications. The proposed method works based on hammering the sample with tapping mode AFM followed by wet cleaning of the residuals. On the area where a specific pattern should be written, the tip-sample interaction force is tuned in a controlled manner by changing the excitation frequency of the cantilever without interrupting the imaging process. Using this method several patterns where transferred to different samples with imaging speed. While the pattern was transferred to the sample in each tracing scan line, the patterned sample was imaged in retracing scan line, thus the outcome was immediately visible during the experiment.

Generation of large field SEM image by panorama composition technology for nano-order measurement

Abstract: Semiconductor manufacturing has a pressing need for a method to accurately evaluate the global shape deformation of a photomask pattern. We thus propose a novel composition technique for a large field panorama image of scanning electron microscopy (SEM). The proposed method optimises the arrangement of segmented imaging regions (SIRs), which are components of a panorama image, on the basis of the design data of the photomask pattern layout. The quantity of the line pattern segment, which is a clue to the connection in an overlapping region between adjoining SIRs and the connectability of any two SIRs, is evaluated. As a result of the optimisation, it is guaranteed that all SIR images can be connected theoretically. For 30 evaluation points, the maximum connection error of the SIR images was 1.5 nm in a simulation using pseudo-SEM images. The maximum total measurement error, which includes the connection error and CD measurement error from the panorama image, is estimated at 2.5 nm. This error was equivalent to about 1.4% of the photomask line width (target: 3%). The experiments using real SEM images demonstrate the effectiveness of the proposed method. It was visually confirmed that a large field, high-resolution and seamless panorama image can be generated.

Wafer hot spot identification through advanced photomask characterization techniques

Abstract: As device manufacturers progress through advanced technology nodes, limitations in standard 1-dimensional (1D) mask Critical Dimension (CD) metrics are becoming apparent. Historically, 1D metrics such as Mean to Target (MTT) and CD Uniformity (CDU) have been adequate for end users to evaluate and predict the mask impact on the wafer process. However, the wafer lithographer’s process margin is shrinking at advanced nodes to a point that the classical mask CD metrics are no longer adequate to gauge the mask contribution to wafer process error. For example, wafer CDU error at advanced nodes is impacted by mask factors such as 3-dimensional (3D) effects and mask pattern fidelity on subresolution assist features (SRAFs) used in Optical Proximity Correction (OPC) models of ever-increasing complexity. These items are not quantifiable with the 1D metrology techniques of today. Likewise, the mask maker needs advanced characterization methods in order to optimize the mask process to meet the wafer lithographer’s needs. These advanced characterization metrics are what is needed to harmonize mask and wafer processes for enhanced wafer hot spot analysis. In this paper, we study advanced mask pattern characterization techniques and their correlation with modeled wafer performance.

Photomask and preparation method for black photo spacer

Abstract: The invention discloses a photomask used for manufacturing a black photo spacer. The photomask comprises a transparent substrate and a sun-shading layer which is formed on the substrate, wherein a first gap is formed in the light-shading layer; and the first gap is 2-5-micron in width. The photomask provided by the invention can be used for manufacturing the black photo spacer of a liquid crystal display panel, so that the liquid crystal display panel is relatively high in product yield. The invention also discloses a manufacturing method for the black photo spacer.

Development of a novel closed EUV pellicle for EUVL manufacturing

Abstract: As for the EUV pellicle, closed pellicle structure with the filters which has fundamentally no penetration path of particles is needed to keep the clean reliability level of photomask equivalent to the current photolithography. We proposed a novel closed EUV pellicle equipped with filters which has not only the particle intrusion prevention but also the ventilation performance. Full-size closed EUV pellicle was fabricated by forming the vent holes in the Si border part and putting the wide filters on the top side of Si border. As the result, we experimentally confirmed the suppression of the membrane deflection under the practical pumping down condition.

Viability of pattern shift for defect-free extreme ultraviolet lithography photomasks

Abstract: Several challenges hinder extreme ultraviolet lithography (EUVL) photomask fabrication and its readiness for high-volume manufacturing (HVM). The lack in availability of pristine defect-free blanks as well as the absence of a robust mask repair technique mandates defect mitigation through pattern shift for the production of defect-free photomasks. By using known defect locations on a blank, the mask design can be intentionally shifted to avoid patterning directly over a defect. The work presented here provides a comprehensive look at pattern shift implementation to intersect EUV HVM for the 7-nm technology node (N7). An empirical error budget to compensate for various measurement errors, based on the latest HVM inspection and write tool capabilities, is first established and then verified postpatterning. The validated error budget is applied to 20 representative EUV blanks and pattern shift is performed using fully functional N7 chip designs that were recently used to fabricate working silicon–germanium devices. Probability of defect-free masks are explored for various N7 photomask levels, including metal, contact, and gate cut layers. From these results, an assessment is made on the current viability of defect-free EUV masks and what is required to construct a complete defect-free EUV mask set.