Showing papers on "Relaxation oscillator published in 2002"

A coupled sawtooth oscillator combining low jitter with high control linearity

Abstract: A new type of relaxation oscillator is presented that combines excellent control linearity with low timing jitter. By using an alternative for the Schmitt trigger, the jitter caused by threshold level noise can be significantly reduced compared to a conventional relaxation oscillator, under equal conditions of control linearity. Circuits realized in a 0.8-/spl mu/m CMOS process show a typical measured distortion in the control characteristic of HD/sub 2/ = -67 dB and HD/sub 3/ = -90 dB (/spl Delta/f = 500 KHz), without using any feedback linearization techniques. The measured phase noise is -102 dBc/Hz at 10-kHz offset at f/sub osc/ = 1.5 MHz (65-ppm rms jitter) for a total supply current of 360 /spl mu/A.

Control system with capacitive detector

Abstract: A capacitive sensor system for controlling operation of a device in response to a rate of change in capacitance due to motion of a proximate object includes at least two sense electrodes (14,16) disposed on a surface and a phase locked loop (12), including a voltage controlled oscillator (22) and a phase/frequency comparator (24), connected between the sense electrodes and an RC network (20) for providing an operating frequency to the sense electrodes. A circuit loop, including a reference oscillator (32), provides a fixed frequency references for the phase locked loop to follow and a phase delay circuit (34) connected between the phase/frequency comparator and the voltage controlled oscillator causes the voltage controlled oscillation to run ahead of the reference oscillator. A trigger circuit (30) provides a control output in response to a change in phase shift between the fixed frequency and the operating frequency.

Relaxation Oscillations in a Class of Delay Differential Equations

Abstract: We study a class of delay differential equations which have been used to model hematological stem cell regulation and dynamics. Under certain circumstances the model exhibits self-sustained oscillations, with periods which can be significantly longer than the basic cell cycle time. We show that the long periods in the oscillations occur when the cell generation rate is small, and we provide an asymptotic analysis of the model in this case. This analysis bears a close resemblance to the analysis of relaxation oscillators (such as the Van der Pol oscillator), except that in our case the slow manifold is infinite dimensional. Despite this, a fairly complete analysis of the problem is possible.

Finding downbeats with a relaxation oscillator

Abstract: A relaxation oscillator model of neural spiking dynamics is applied to the task of finding downbeats in rhythmical patterns. The importance of downbeat discovery or 'beat induction' is discussed, and the relaxation oscillator model is compared to other oscillator models. In a set of computer simulations the model is tested on 35 rhythmical patterns. The model performs well, making good predictions in 34 of 35 cases. In an analysis we identify some shortcomings of the model and relate model behavior to dynamical properties of relaxation oscillators.

Voltage controlled oscillator with two layered mounting structure

Abstract: A voltage controlled oscillator is provided. The oscillator includes a surface acoustic wave element for forming a feedback circuit for an amplifier, and a phase adjustment circuit including a filter which is interposed in the feedback circuit. The oscillator also has a phase shifter including a hybrid coupler to which an additional control part is attached for changing a phase value within an oscillation loop with a control voltage supplied from an external source. An equal power divider equally distributes output power within the oscillation loop and supplies the output power outside the oscillation loop. A multi-layer board is used for mounting the amplifier, surface acoustic wave element, phase adjustment circuit, phase shifter, and equal power divider in at least two separate layers.

Multiple VCO phase lock loop architecture

Abstract: A dual VCO phase lock loop system is provided that includes a first voltage controlled oscillator that provides a first oscillation signal relative to a first frequency and a second voltage controlled oscillator that provides a second oscillation signal relative to a second frequency. A loop filter capacitor may be associated with both the first voltage controlled oscillator and the second voltage controlled oscillator. A selection device may enable components associated with the either one of the voltage controlled oscillators while disabling components associated with the other one of the voltage controlled oscillators.

Bandpass chaotic dynamics of electronic oscillator operating with delayed nonlinear feedback

Abstract: An electronic noise-generator producing high-dimensional narrowband chaotic signals is reported. The generator has the form of a delayed nonlinear feedback circuit. It has potential applications in secure communications.

Synchronization of driven nonlinear oscillators

Abstract: Mathematical models of nonlinear oscillators are used to describe a wide variety of physical and biological phenomena that exhibit self-sustained oscillatory behavior. When these oscillators are strongly driven by forces that are periodic in time, they often exhibit a remarkable “mode-locking” that synchronizes the nonlinear oscillations to the driving force. The purpose of this paper is to demonstrate that a similar phenomenon occurs when nonlinear oscillators are strongly driven by a force that is varying randomly in time. In this case the synchronization is less obvious for a single oscillator, but when several oscillators with different initial conditions or phases are driven with the same aperiodic force, their fluctuating behavior may reliably converge to an identical response. Analytical estimates are derived for the conditions, rates, and structural stability for the synchronization of a broad class of aperiodically driven nonlinear oscillators.

Multirhythmicity generated by slow variable diffusion in a ring of relaxation oscillators and noise-induced abnormal interspike variability.

Abstract: The deterministic and noise-dependent dynamics of a ring of three Ohmically coupled electronic relaxation oscillators are considered by means of numerical simulations. Each isolated oscillator is described by a set of two ordinary differential equations with very different characteristic times. The emergence of the limit cycle via the Hopf bifurcation results from the N-shaped current-versus-voltage characteristic of the nonlinear resistor. The phase diagram is calculated for a ring of three such oscillators in the presence of small detuning. Special attention is focused on two parameter areas, one near a transition to the homogeneous and the other near the inhomogeneous stable steady state. Along with other nontrivial limit cycles, essentially asymmetrical limit cycles termed dynamic traps may arise in these two areas. A dynamic trap is a regime in which one or two oscillators do not perform full-amplitude oscillations and, correspondingly, do not generate spikes. The interspike interval (ISI) distribution in the presence of noise is calculated as a function of the coupling strength in both areas of the parameter plane. The distributions are extremely polymodal near the homogeneous steady state even if the in-phase limit cycle is dominating. The origins of this abnormal enhancement of ISI variability are discussed in detail. A similar analysis shows that nontrivial periodic attractors are observable in the vicinity of the inhomogeneous stable steady states only if the level of noise is relatively low. In this case, the dominance of the in-phase limit cycle basin results in an almost unimodal distribution of interspike intervals.

Analysis and control of harmonic radiation from active integrated oscillator antennas

Abstract: Harmonic radiation from microstrip patch oscillators is examined experimentally and theoretically using both a single and dual parallel-tuned circuit Van der Pol oscillator model. Closed-form expressions are obtained for the fundamental and first harmonic voltage amplitudes, and results show reasonably good agreement with a commercial circuit simulator. Such expressions will be useful for designers of active integrated antennas, giving them greater physical insight into their operation. Experimental results are presented for three configurations of a patch oscillator, i.e., rectangular patch, circular-sector patch, and quarter-wave shorted patch. The latter two configurations present very low resistance at the first harmonic frequency and this leads to improved harmonic suppression performance. This is in qualitative agreement with theoretical predictions.

Method for modulating an output voltage of a RF transmitter circuit, and RF transmitter circuit

Abstract: The invention relates to a method for modulating an output voltage of a transmitter circuit comprising a voltage controlled oscillator, a digital/analog converter and an antenna circuit, the method comprising the method comprising sending an output signal of sufficient power from the voltage controlled oscillator directly to the antenna circuit and directly modulating a frequency of the output signal of the voltage controlled oscillator. The invention furthermore relates to a transmitter circuit comprising a voltage controlled oscillator having a tank circuit, a digital/analog converter and an antenna circuit, wherein the voltage controlled oscillator is adapted to send an output signal of sufficient power directly to the antenna circuit and wherein the digital/analog converter is arranged to modulate an output frequency of the voltage controlled oscillator. A capacitive load circuit may be connected to the tank circuit or a crystal oscillator circuit of the voltage controlled oscillator for modulating the frequency of the voltage controlled oscillator.

Circuit configuration and method for determining a time constant of a storage capacitor of a memory cell in a semiconductor memory

Abstract: A ring oscillator has a multiplicity of inverters. An interconnect is connected between two of the inverters, and a storage capacitor to be measured, with its associated lead resistor, is coupled to the interconnect either via an interconnect or a transistor can selectively coupled and decouple the capacitor and the lead resistance. A measuring device is connected up to the ring oscillator and is used to determine a value for the oscillation frequency of the ring oscillator on the basis of which a value for the time constant of the storage capacitor can be determined.

Reduction of relaxation oscillations in optical automatic gain clamped EDFA using fast electronic feedforward

Abstract: A theoretical investigation of reduction of relaxation oscillations in optical automatic gain clamped erbium-doped fibre amplifiers (EDFAs) with fast electronic feedforward is reported. The results showed that the speed of control electronics or corresponding response times, 4, 6 or 8 /spl mu/s, bounded the reductions of the relaxation oscillations for 40, 20 or 10 channels, respectively.

Low phase noise oscillator

Abstract: An oscillator is described which exhibits low phase noise characteristics. The oscillator circuit of the invention includes an inductor in series with a low value capacitor, this series combination of an inductor and a capacitor, in parallel with a low value inductor forms a resonator whose inductive and capacitive reactances are a very low value. This causes the loaded Q to be very close to the resonator's unloaded Q.

Oscillator circuit having an improved capacitor discharge circuit

Abstract: An oscillator circuit ( 300 ) disclosed herein includes an improved capacitor discharge circuit. The oscillator includes at least one capacitor coupled to a charging circuit portion ( 202, 210 ) and a discharging circuit portion ( 208 ) through a switching network ( 204, 216, 218, 220 and 222 ). In the alternative, an oscillator including more than one capacitor includes respective charging and discharging circuit portions connected to respective switching networks. Each charging circuit portion ( 202, 210 ) provides sufficient charge to charge the coupled capacitor ( 206 ) to a high threshold voltage (V tH ). Each discharging circuit portion ( 208 ) discharges each coupled capacitor ( 206 ) to a low threshold voltage (V tL ). The switching network alternately connects each coupled capacitor ( 206 ) to the charging circuit portion ( 202, 210 ) and the discharging circuit portion ( 208 ) to thereby alternately charge and discharge for each coupled capacitor ( 206 ) alternately. A set/reset flip-flop ( 214 ) connected to the switching network ( 204, 216, 218, 220 and 222 ) enables and disenables the charging cycle and the discharge cycle of the oscillator 200.

Threshold Energy Switching and Its Application to Wireless Sensing in High Energy Manufacturing Processes

Abstract: A solid state threshold energy switching device based on a relaxation oscillator is discussed in the context of a self energizing wireless pressure sensor. The study is an integral part of the design of a wireless pressure sensor for in-situ injection molding machine cavity pressure measurement and real time process control. The pressure information is measured using a piezoelectric stack and converted to a train of ultrasonic pulses, using the oscillator based threshold switching device, to a receiver outside of the mold. In this paper the threshold switching device is developed, simulated using a circuit simulation program, and validated experimentally. Its properties are discussed with reference to pressure measurement and acoustic signal transmission.Copyright © 2002 by ASME

Inspection method of crystal oscillator

Abstract: PROBLEM TO BE SOLVED: To provide a practical and highly reliable inspection method of a crystal oscillator without the need of limiting the range of a power supply voltage and a frequency control voltage for invalidating the functions of a constant voltage circuit and a constant current circuit. SOLUTION: An oscillation frequency Fosc outputted from an output terminal 7 is measured while changing the capacitance of a first capacitor C1 and/or a second capacitor C2 of an oscillation circuit 2 and whether the crystal oscillator is normal or defective is discriminated based on an obtained measured value. COPYRIGHT: (C)2004,JPO

CMOS relaxation oscillator circuit with improved speed and reduced process/temperature variations

Abstract: An improved relaxation oscillator circuit is provided using conventional CMOS device shunted with a current source ( 101 and 103 ) at each load of two cross-coupled gain stages. The improved oscillator uses a clamp voltage reference ( 134 ), to control the voltage swing across the charging/discharging capacitor ( 118 ). The improvements provide improved speed to power ratio, increased frequency tuning range, and less process and temperature variation effects. A transistor ( 130 ) and current source ( 138 ) replicate output transistors ( 110, 114 ) and current sources ( 101, 103 ). An amplifier ( 132 ) receives a clamp voltage reference ( 134 ) and current from the transistor ( 130 ) and current source ( 138 ) and functions to provide necessary drive currents to the gates of transistors ( 110, 114 ) which drive the outputs (VOR, VOL).

Tunable voltage controlled oscillator

Abstract: A voltage controlled oscillator incorporating a ferroelectric capacitor in its resonant circuit is provided in order to provide superior phase noise performance and a linear control voltage/capacitance relationship. The resonant circuit may include multiple ferroelectric capacitors and multiple control voltages in order to provide band switching capability and/or increase the tuning range of the oscillator. The feedback loop of the oscillator may also incorporate a ferroelectric capacitor in order to adaptively optimize the feedback.

A low-voltage quadrature log-domain oscillator

Abstract: A new quadrature oscillator is proposed in bipolar technology. It exploits the exponential nature of bipolar transistors and thus it is suitable for low distortion operation at low supply voltage. The resulting circuits are very simple in structure and easy to design. The frequency of oscillation can be linearly controlled by the bias current. Simulation results in SPICE are given.

Bistability of harmonically forced relaxation oscillations

Abstract: Relaxation oscillations appear in processes which involve transitions between two states characterized by fast and slow time scales. When a relaxation oscillator is coupled to an external periodic force its entrainment by the force results in a response which can include multiple periodicities and bistability. The prototype of these behaviors is the harmonically driven van der Pol equation which displays regions in the parameter space of the driving force amplitude where stable orbits of periods 2n ± 1 coexist, flanked by regions of periods 2n + 1 and 2n - 1. The parameter regions of such bistable orbits are derived analytically for the closely related harmonically driven Stoker–Haag piecewise discontinuous equation. The results are valid over most of the control parameter space of the system. Also considered are the reasons for the more complicated dynamics featuring regions of high multiple periodicity which appear like noise between ordered periodic regions. Since this system mimics in detail the less analytically tractable forced van der Pol equation, the results suggest extensions to situations where forced relaxation oscillations are a component of the operating mechanisms.

A silicon stress-sensitive unijunction transistor

Abstract: The performance of a silicon stress-sensitive unijunction transistor is investigated. The transistor is classed as a stress-sensitive semiconductor lateral bipolar device with an S-type input (emitter) I-V characteristic. The optimal layout of the device and its basic parameters are determined. The device can serve as a basis for designing relaxation oscillators with the physically integrated function of mechanical stress-to-signal frequency conversion at the output.

A square-rooting current-to-frequency converter

Abstract: A square-rooting current-to-frequency converter (CFC) is presented in this paper. It has been designed by using the current controlled resistor (CCR) in CMOS technology with bisection of the input voltage, and one relaxation oscillator. CCR is used-instead of the resistor within the relaxation oscillator. In this way, the time constant of the relaxation oscillator is current-controlled. There is no need for a high stable voltage or current references in the proposed circuit. By appropriate setting of the process, parameters of the MOSFETs used, the temperature variations of the output frequency can be made smaller than 7/spl times/10/sup -3/%/K. Experimental results confirm that the behavior of the proposed square-rooting CFC is in good agreement with the predictions of the analysis performed. According to these results, relative errors are less than 1% for the input current range from 35 /spl mu/A to 15 mA, and for the output frequency range from 1.45 kHz to 9.80 kHz.

Voltage-controlled oscillator and electronic device using the same

Abstract: A voltage-controlled oscillator includes a varactor diode which is a capacitance element coupled to a resonance circuit. A control voltage is applied to one end of the varactor diode and the output voltage of a variable DC voltage source which is capable of changing a voltage value stepwise is applied to the other end of the varactor diode via a voltage divider. Accordingly, the voltage-controlled oscillator can be operated as a local oscillator used for two communication systems. Further, a switching element is not required and thus deterioration in the characteristics caused by a reduction in the Q factor of the resonance circuit can be prevented. In addition, the power consumption does not increase.

A Highly Stabilized GaAs FET Oscillator Using a Dielectric Resonator Feedback Circuit

Abstract: On the basis of analysis of the dielectric resonator and the properties of feedback circuit, a new type of highly stabilized GaAs FET oscillator has been developed using a dielectric resonator and a stabilization resistor in the feedback circuit has been developed. In considering the deviation circuit of the oscillator,the results indicate that the GaAs FET oscillator fabricated with a microwave integrated circuit has a high external quality of more than 1 000. In the case of high efficiency of 20 percent with 70 mW output power at 11.85 GHz; a wide tuning range is more than 1 000 MHz; in the case of a wide oscillator frequency from 9 to 14 GHz with same MIC pattern by using five dielectric resonators of different sizes. A high frequency stability as low as 150 kHz in the temperature range is from -20 to +60.

Superstable Synchronous Phenomena of Switch-Coupled Relaxation Oscillators

Abstract: As two simple relaxation oscillators are coupled by periodical and instantaneous switching, the system exhibits rich superstable synchronous phenomena. In order to analyze the phenomena, we derive a hybrid return map of real and binary variables; and give theoretical results for (1) superstability of the synchronous phenomena and (2) period of the synchronous phenomena as a function of the parameters. Using a simple test circuit, typical phenomena are verified in the laboratory. key words: coupled oscillators, hysteresis, synchronization, bi-

The existence of closed trajectory in the van der Pol oscillator

Abstract: The van der Pol (VDP) equation is a nonlinear differential equation, and it is also the mathematical model for an audion circuit It has given much attention by researchers and has been widely used in many fields In this paper, using the noted Poincare-Bendixson theorem, we propose a new proof of the existence of closed trajectory in the van der Pol oscillator when damping value is positive (/spl mu/>0) By comparison, we find that, our method is natural and simple

A low-cost and accurate interface for conductivity sensors

Abstract: This paper presents a low-cost and accurate interface for four-electrode conductivity sensors. The interface mainly consists of an analog front-end, a multiplexer and a voltage-to-time converter. The analog front-end is used to provide a controlled excitation voltage signal for the sensor and to convert the sensor signal (conductivity) into a voltage signal. The voltage-to-time period converter acts as an asynchronous converter for the sensor signals (voltage) employing a relaxation oscillator which output is a period-modulated signal. Experimental results over a conductance range of 0.1 /spl mu/S to 20 mS show a random error of 0.32 /spl mu/S and a systematic error of 1.32 /spl mu/S for a measurement time of 400 ms.