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Showing papers on "Silicon oxide published in 1996"


Journal ArticleDOI
TL;DR: In this article, semi-empirical tight-binding and ab initio local density calculations demonstrating the meta-stability of self-trapped excitons at the surface of silicon nanocrystallites are presented.
Abstract: We present semiempirical tight-binding and ab initio local density calculations demonstrating the (meta)stability of self-trapped excitons at the surface of silicon nanocrystallites. These are obtained for dimer bonds passivated, for instance, by hydrogen atoms or by silicon oxide. Light emission from these trapped excitons is predicted in the infrared or in the near visible. We are thus led to the interpretation that part of the luminescence is due to such surface states while optical absorption is characteristic of quantum confinement effects. These conclusions should extend to other semiconductor crystallites.

293 citations


Patent
05 Feb 1996
TL;DR: In this paper, a method of forming a fluorinated silicon oxide dielectric layer by plasma chemical vapor deposition is described, which includes the steps of creating a plasma in a plasma chamber and introducing a silicon-containing gas, a fluorine-containing gaseous gas, oxygen and an inert gas such that the gases are excited by the plasma and react proximate a substrate to form a polysilicon oxide layer on the surface of the substrate.
Abstract: A method of forming a fluorinated silicon oxide dielectric layer (33) by plasma chemical vapor deposition. The method includes the steps of creating a plasma in a plasma chamber (10) and introducing a silicon-containing gas, a fluorine-containing gas, oxygen and an inert gas such that the gases are excited by the plasma and react proximate a substrate (16) to form a fluorinated silicon oxide layer on the surface of the substrate (16). The fluorinated layer so formed has a dielectric constant which is less than that of a silicon oxide layer.

213 citations


Patent
Chen-Hua Yu1
24 Sep 1996
TL;DR: In this article, a method of fabricating a MOSFET device structure, featuring a double insulator spacer, and improved source and drain engineering, has been developed.
Abstract: A method of fabricating a MOSFET device structure, featuring a double insulator spacer, and improved source and drain engineering, has been developed. A silicon nitride--silicon oxide, double spacer, is used to prevent thinning of the insulator spacer, during a buffered hydrofluoric acid procedure, used prior to a metal deposition and metal silicide formation. A lightly doped source and drain region is formed prior to creation of the silicon oxide spacer, a medium doped source and drain region is formed prior to creation of the silicon nitride spacer, and a heavily doped source and drain region is formed following the creation of the silicon nitride spacer. This source and drain configuration increases device performance and reliability.

207 citations


Patent
14 Feb 1996
TL;DR: In this article, a method of and apparatus for depositing a silicon oxide layer onto a wafer or substrate is provided, which includes introducing into a processing chamber a process gas including silicon, oxygen, boron, phosphorus and germanium.
Abstract: A method of and apparatus for depositing a silicon oxide layer onto a wafer or substrate is provided. The present method includes introducing into a processing chamber a process gas including silicon, oxygen, boron, phosphorus and germanium to form a germanium doped BPSG oxide layer having a reflow temperature of less than 800° C. Preferred embodiments of the present method are performed in either a subatmospheric CVD or a plasma enhanced CVD processing apparatus.

204 citations


Patent
01 Apr 1996
TL;DR: In this paper, a void-free and gap-filling doped silicon oxide insulator layer is formed through a Plasma Enhanced Chemical Vapor Deposition (PECVD) deposition method undertaken simultaneously with a Reactive Ion Etch (RIE) etch-back method.
Abstract: A method for forming a void-free and gap-filling doped silicon oxide insulator layer upon a patterned substrate layer within an integrated circuit. Formed upon a semiconductor substrate is a patterned substrate layer. Formed upon the patterned substrate layer is a doped silicon oxide insulator layer. The doped silicon oxide insulator layer is formed through a Plasma Enhanced Chemical Vapor Deposition (PECVD) deposition method undertaken simultaneously with a Reactive Ion Etch (RIE) etch-back method. The Plasma Enhanced Chemical Vapor Deposition (PECVD) deposition method and the Reactive Ion Etch (RIE) etch-back method simultaneously employ a Tetra Ethyl Ortho Silicate (TEOS) silicon source material, a dopant source material, an oxygen source material and an etching gas.

192 citations


Journal ArticleDOI
TL;DR: In this article, the oxide mediated epitaxy (OME) technique was used to grow single-crystal CoSi2 layers on Si surfaces by placing a thin layer of cobalt (1-3 nm) onto surfaces covered with a thin silicon oxide layer and annealing at 500-700 °C.
Abstract: Uniform, single‐crystal CoSi2 layers have been grown on Si by the technique of oxide mediated epitaxy (OME). Deposition of a thin layer of cobalt (1–3 nm) onto surfaces covered with a thin silicon oxide layer and annealing at 500–700 °C led to the growth of epitaxial, essentially uniform, CoSi2 layers on the (100), (110), and (111) surfaces of Si. The nucleation and growth of silicide apparently occurred subsurface, leaving the silicon oxide layer largely on the surface of the silicide after the growth. On all surfaces, thicker (10–30 nm), excellent quality, CoSi2 single‐crystal thin films have been grown by repeated growth sequences. Experimental results are presented along with a discussion on the possible roles played by the thin oxide layer in promoting the epitaxial growth of silicide.

183 citations


Journal ArticleDOI
Min Tae Kim1
TL;DR: In this paper, the influence of substrate on the elastic reaction of a thin film was investigated using a load and depth-sensing microhardness tester, where the elastic deformation was considered for the normal point load to a flat quasi-infinite surface under the assumption of perfect adhesion between the film and substrate.

179 citations


Journal ArticleDOI
TL;DR: In this article, the results of a series of mutually related experiments are given about surface passivation with direct Plasma Enhanced Chemical Vapour Deposition (PECVD) of silicon oxide (Sioxide) and silicon nitride (Si-nitride), combined with harmonically modulated microwave reflection experiments are combined with Capacitance-Voltage measurements on Metal-Insulator-Silicon structures (CV-MIS), accelerated degradation tests and with Secondary Ion Mass Spectrometry (SIMS) and Elastic Recoil Detection (ERD) measurements of hydrogen and deuterium

154 citations


Journal ArticleDOI
TL;DR: In this article, a stable blue photoluminescence (PL) at 580 nm visible to the naked eye has been observed for the samples consisting of Ge nanocrystals (nc•Ge) embedded in a silicon oxide (SiO2) solid matrix, fabricated by atmospheric pressure chemical vapor deposition techniques.
Abstract: Stable blue photoluminescence (PL) at 580 nm visible to the naked eye has been observed for the samples consisting of Ge nanocrystals (nc‐Ge) embedded in a silicon oxide (SiO2) solid matrix, fabricated by atmospheric pressure chemical vapor deposition techniques. Raman spectroscopy measurement strongly suggests the existence of Ge nanocrystal in the SiO2 matrices. The size of nc‐Ge is dependent on aftergrowth thermal treatment under nitrogen ambient, and it is found that temperature above 700 °C for 1 h only exhibits the PL peak at the visible wavelength. The samples annealed for longer times at 700 °C do not exhibit any PL peak which is correlated with the change of the nanocrystal size.

137 citations


Patent
13 Nov 1996
TL;DR: In this paper, a method for forming the ultra-thin dope area of a substrate is used in the chamber containing a process for depositing a doped silicon oxide film containing dopant atoms on the substrate on a heater whose temperature is at least 500 deg.C from the reaction of silicon, oxygen and dopant.
Abstract: PROBLEM TO BE SOLVED: To provide cleaning system/method/device, which form a dielectric film having the uniformity of thickness, satisfactory gap filling performance, high density and low moisture and have high temperature deposition/heating and satisfactory efficiency. SOLUTION: In a chamber with the pressure of about 100-760Torr, a method for forming the ultra-thin dope area of a substrate is used in the chamber containing a process for depositing a doped silicon oxide film containing dopant atoms on the substrate on a heater whose temperature is at least 500 deg.C from the reaction of silicon, oxygen and dopant and a process for heating the doped silicon oxide film for diffusing the dopant atoms in the substrate and forming the ultra-thin dope area.

133 citations


Journal ArticleDOI
24 Jan 1996-Langmuir
TL;DR: In this article, the effect of organic surface chemistry on calcite nucleation, attachment, and growth was studied in the presence of various ultrathin-film organosilane-modified silicon wafers.
Abstract: In order to study the effect of organic surface chemistry on calcite nucleation, attachment, and growth, calcium carbonate was precipitated in the presence of various ultrathin-film organosilane-modified silicon wafers. The chemistry of the aminosilane surfaces was systematically changed by the coupling of various acidic molecules, without creating a geometric lattice of acidic functional groups. Optical microscopy, scanning electron microscopy with image analysis, and X-ray scattering were employed to characterize crystallite density and orientation normal to the surface. Calcite grown on amino-modified surfaces was produced with the equilibrium rhombohedral habit and had the 〈104〉 orientation. Surfaces of the silicon oxide, carboxylate, iminodiacetate, or phosphoramidate tended to favor the orientation of surface crystals along 〈001〉 or near the 〈001〉 axes of the crystal. Primarily this is a result of the affinity of the surface for cations, but functional-group-mediated ion ordering and/or stereochemic...

Patent
13 Nov 1996
TL;DR: In this paper, a method for forming ultra-shallow doped regions, including the following steps: under a temperature of at least 500 DEG C in the chamber and from the reaction of silicon, oxygen, and some dopants for deposition of a doped silicon oxide film on the substrate of a heater, where the doped oxide film including dopant atoms and the chamber being kept under a pressure between 100 to 7600 torr.
Abstract: Method for forming ultra-shallow doped regions, including the following steps: under a temperature of at least 500 DEG C in the chamber and from the reaction of silicon, oxygen, and some dopants for deposition of a doped silicon oxide film on the substrate of a heater, where the doped silicon oxide film including dopant atoms and the chamber being kept under a pressure between 100 to 7600 torr; and heating the doped silicon oxide film for diffusion of the doped atoms and into the substrate for forming the ultra-shallow doped region.

Journal ArticleDOI
06 Mar 1996-Langmuir
TL;DR: In this article, the authors describe an approach for Au and Ag colloid monolayer formation on different silicon oxide surfaces such as glass, silicon, and ITO, which is simple and yields monolayers with easily controlled spacing within the monlayer without aggregation of metal particles.
Abstract: We describe a novel approach for Au and Ag colloid monolayer formation on different silicon oxide surfaces such as glass, silicon, and ITO. The preparation method is simple and yields monolayers with easily controlled spacing within the monolayer without aggregation of metal particles. The colloid monolayers are prepared in two steps: (1) modification of the substrates with starburst dendrimers and (2) noble metal colloid deposition onto the dendrimer layer. Different Au and Ag colloids, ranging from 15 to 80 nm in particle diameter, have been deposited onto the dendrimer-modified surfaces. The structure and properties of the resulting particle arrays have been studied by atomic force microscopy (AFM), scanning electron microscopy (SEM), X-ray photoelectron spectroscopy (XPS), UV−vis spectroscopy, and surface-enhanced Raman scattering (SERS). XPS data show that the dendrimers spontaneously adsorb to various silicon oxide surfaces. The thickness of the dendrimer overlayer has been calculated and lies in t...

Journal ArticleDOI
11 Dec 1996-Langmuir
TL;DR: In this paper, the structure of hexadecyltrimethylammonium bromide (C16TAB) layers was investigated on smooth and rough surfaces, showing that the roughness of the surface has a significant effect on the properties of the layer.
Abstract: Neutron reflection has been used to investigate the structure of hexadecyltrimethylammonium bromide (C16TAB) layers adsorbed at the silicon/silicon oxide/aqueous interface. Separate isotopic labeling of groups of four methylene groups at a time made it possible to determine the structure of the layer at a higher resolution than previously possible. The structure of the layer was investigated on smooth and rough surfaces. The roughness of the surface has a significant effect on the properties of the layer. On the rough surface the bilayer is shown to be thicker and to be unsymmetrical in the direction of the surface normal. The surface coverage was also found to be lower on the rough surface. As in previous studies the surface was found not to be completely covered, lending support to the idea that adsorption is in the form of aggregates. The division into smaller isotopically labeled fragments shows, however, that the aggregates strongly resemble bilayer fragments, and their overall thickness, at 32 ± 1 A...

Patent
04 Jan 1996
TL;DR: In this article, the authors describe a process for the production of semiconductor devices comprising the steps of applying a solution of the specified polycarbosilane in a solvent onto a substrate having electrically conductive components fabricated therein, and curing the coated layer of the polycarbosailane at a temperature of not less than 350° C.
Abstract: Process for the production of semiconductor devices comprising the steps of applying a solution of the specified polycarbosilane in a solvent onto a substrate having electrically conductive components fabricated therein, and curing the coated layer of the polycarbosilane at a temperature of not less than 350° C. in an oxidizing atmosphere to thereby covert the polycarbosilane layer to a silicon oxide layer. The resulting silicon oxide layer has a planarized surface and has no cracking and accordingly is useful as a dielectric layer and a protective layer in the production of semiconductor devices having a high reliability.

Journal ArticleDOI
24 Jan 1996-Langmuir
TL;DR: In this article, the structure and composition of octadecyltrichlorosilane (OTS) self-assembled layers of tetraethylene glycol monodecyl ether (C 12 E 4 ) was examined under water.
Abstract: We have used neutron reflection to study, for the first time, the structure of a surfactant layer adsorbed at the hydrophobic solid/water interface. Isotopic labeling of the water and of the hydrophobic self-assembled layer of octadecyltrichlorosilane (OTS) was first used to characterize protonated and deuteriated hydrophobic layers on the silicon oxide on the (111) face of silicon. This is the first time the structure and composition of such layers has been examined under water. Some water penetration into both the silicon oxide layer and the hydrophobic layer was observed. In the former case this is attributed to roughness of the oxide layer and in the latter to imperfections in the OTS layer. The thickness of the OTS layer was found to be 24 ± 2 A, in agreement with other measurements in air. The adsorption isotherm of the surfactant tetraethylene glycol monododecyl ether (C 12 E 4 ) was measured using two independent measurements (different isotopic compositions) on the deuteriated OTS layer. The surfactant was found to reach a constant excess at the critical micelle concentration (cmc) very similar to that at the air/water interface, i.e., an area per molecule of about 50 A 2 . The thickness of the surfactant layer was also found to be similar to that at the air/water interface and decreased rapidly with decreasing coverage. Estimates of the angle of tilt of the surfactant molecules from the surface normal were 53 ± 10° and 75 ± 10° at the highest and lowest coverages, respectively. Isotopic labeling of the two halves of the surfactant molecule was used to show that the molecule is partially oriented with the ethylene glycol groups pointing outward toward the aqueous solution. At the cmc the thicknesses of the two halves of the surfactant molecule were both found to be 10 ± 2 A, to be compared with fully extended chain lengths of 16.9 (alkyl chain) and 14.2 A(ethylene glycol chain). Some penetration of the OTS layer by the surfactant was observed at the highest surfactant coverages.

Patent
Kaoru Mikagi1
12 Apr 1996
TL;DR: In this paper, a silicon oxide film is formed on a silicon substrate with a diffusion layer, and a contact hole is formed in the contact hole by a BPSG film.
Abstract: A silicon oxide film is formed on a silicon substrate with a diffusion layer, and a contact hole is formed in the silicon oxide film. A protective film made of an oxide film and a nitride film is formed over the whole surface of the substrate, and the contact hole is buried with a BPSG film. Another silicon oxide film is deposited over the substrate and an interconnection trench is formed in this silicon oxide film. After the BPSG film is removed, a TiN/Ti film is formed over the whole surface of the substrate. A Cu film is grown by MO-CVD, and thereafter the Cu film and TiN/Ti film on the surface of the substrate are partially removed by CMP. A highly reliable contact plug and a trench burying higher level interconnection are formed even where contacts are margin-less or where alignment errors are present.

Patent
20 Feb 1996
TL;DR: In this article, a self-aligned halo process is described for forming an LDD structure using selfaligned self-alignments, where a gate silicon oxide layer is provided over the surface of a semiconductor substrate and an opening is provided through the insulating layer to one of the source and drain regions.
Abstract: A method for forming an LDD structure using a self-aligned halo process is described. A gate silicon oxide layer is provided over the surface of a semiconductor substrate. A gate electrode is formed overlying the gate silicon oxide layer. A silicon oxide layer is grown on the sidewalls of the gate electrode and silicon nitride spacers are formed on the sidewalls of the silicon oxide layer. First ions are implanted into the semiconductor substrate and the substrate is annealed whereby heavily doped source and drain regions are formed within the semiconductor substrate not covered by the gate electrode and the silicon oxide and silicon nitride spacers. An oxide layer is grown over the heavily doped source and drain regions. Thereafter, the silicon nitride spacers are removed. Second ions are implanted to form lightly doped regions in the semiconductor substrate not covered by the oxide layer. Third ions are implanted to form a halo having opposite dosage and a deeper junction than the lightly doped regions. An insulating layer is deposited over the surface of the substrate. An opening is provided through the insulating layer to one of the source and drain regions. A conducting layer is deposited overlying the insulating layer and within the opening and patterned completing the fabrication of the integrated circuit device.

Journal ArticleDOI
TL;DR: A systematic study of the dependence of photoluminescence from porous silicon (PS) on oxidation extent and measurement temperature is given and results conflict with predictions of the quantum confinement model for PS luminescence.
Abstract: A systematic study of the dependence of photoluminescence from porous silicon (PS) on oxidation extent and measurement temperature is given. Oxidation of PS samples at room temperature up to 200 \ifmmode^\circ\else\textdegree\fi{}C results in photoluminescence spectra with maxima centered around 1.7 eV. The photoluminescence maxima shift with temperature 10--300 K always toward the 1.7-eV position. These results conflict with predictions of the quantum confinement model for PS luminescence, but can be explained by assuming that several types of luminescence center outside nanoscale Si units in PS are responsible for the luminescence, and that their relative contributions to luminescence change with oxidation extent and measurement temperature. The luminescence centers with luminescence wavelength around 700 nm in ${\mathrm{SiO}}_{\mathit{x}}$ layers, covering the nanoscale silicon particles or on the interfaces of nanoscale Si/${\mathrm{SiO}}_{\mathit{x}}$ in PS, dominate after sufficient oxidation and their luminescence depends on measurement temperature to a lesser extent than other types of luminescence center do. \textcopyright{} 1996 The American Physical Society.

Journal ArticleDOI
TL;DR: In this paper, it was shown that the performance of indium-oxide-based sensors is qualitatively very similar to that of tin-oxide based sensors, and that indiumoxide sensors are significantly more sensitive to butane and propane compared to other test gases.
Abstract: Reactively sputtered SnOx and InOx thin films, plain and surface doped with Pt, have been covered with layers of various insulating films and catalysts Test gases used are carbon monoxide, methane, ethanol, butane and propane Filters used are alumina (Al2O3), silicon oxide (SiO2) and tungsten trioxide (WO3) Palladium has also been added on the surface of alumina filters, while platinum is added on the surface of metal-oxide sensor films Response to hydrocarbons, and especially to butane and propane is found to be enhanced with the addition of noble metals on the sensing film or on the filter It is also found that a WO3 filter improves the carbon monoxide sensitivity at low working temperatures and reduces the sensor response to ethanol with respect to other test gases The behaviour of indium-oxide-based sensors is qualitatively very similar to that of tin-oxide-based sensors

Patent
24 Apr 1996
TL;DR: In this paper, high-quality SiO2 films using disilane (Si2 H6) and nitrous oxide (N2 O) as silicon and oxygen precursors in an otherwise conventional reactor such as a parallel plate plasma reactor were used for fabrication of microdevices and circuits.
Abstract: High-quality SiO2 films may be deposited at low temperatures by plasma-enhanced chemical vapor deposition using disilane (Si2 H6) and nitrous oxide (N2 O) as silicon and oxygen precursors in an otherwise conventional reactor such as a parallel plate plasma reactor. The properties of the SiO2 films deposited at 120° C. using Si2 H6 and N2 O were not significantly different from those of conventional SiH4 -based SiO2 films deposited at the significantly higher temperature range 250°-350° C. PECVD deposition of SiO2 films using Si2 H6 and N2 O provides a practical low temperature process for fabricating microdevices and circuits. This low temperature process can be used for deposition in the presence of polymers, semiconductors, and other components that would melt, decompose, or otherwise be sensitive to higher temperatures. Fluorinated silicon oxide may also be deposited at the relatively low temperature of 120° C. with plasma-enhanced chemical vapor deposition using CF4 as a fluorine source in the deposition process from Si2 H6 and N2 O. The incorporation of fluorine maintains the physical properties of the films, while improving their electrical properties, such as reducing failures due to early dielectric breakdowns, enhancing performance as an insulator, and reducing the presence of unwanted electrical charges.

Patent
09 Oct 1996
TL;DR: Goniochromatic luster pigments based on multiply coated platelet-shaped metallic substrates comprising at least one layer packet of A) a layer consisting essentially of silicon oxide, silicon oxide hydrate, aluminum oxide and/or aluminum oxide hydrates, and B) a nonselectively absorbing, silicon-containing layer which is at least partially transparent to visible light, and also, if desired, an outer layer which consists essentially of colorless or selectively absorbing metal oxide, are useful for coloring paints, inks and including printing inks, plastics, glasses, ceramic products and
Abstract: Goniochromatic luster pigments based on multiply coated platelet-shaped metallic substrates comprising at least one layer packet of A) a layer consisting essentially of silicon oxide, silicon oxide hydrate, aluminum oxide and/or aluminum oxide hydrate, and B) a nonselectively absorbing, silicon-containing layer which is at least partially transparent to visible light, and also, if desired, additionally C) an outer layer which consists essentially of colorless or selectively absorbing metal oxide, are useful for coloring paints, inks, including printing inks, plastics, glasses, ceramic products and decorative cosmetic preparations.

Journal ArticleDOI
TL;DR: In this article, an improved method for characterizing thin oxide films using Fowler-Nordheim field emission is reported. But the method uses a conducting-tip atomic force microscope with dual feedback systems, one for the topography and the second for the field emission bias voltage.
Abstract: An improved method for characterizing thin oxide films using Fowler‐Nordheim field emission is reported. The method uses a conducting‐tip atomic force microscope with dual feedback systems, one for the topography and a second for the field emission bias voltage. Images of the voltage required to maintain a 10 pA emission current through a 3 nm oxide film thermally grown on p‐type Si(100) demonstrate a spatial resolution of 8 nm.

Patent
Tadashi Yamamoto1, Shizuo Sawada1
07 Mar 1996
TL;DR: In this paper, a back-gate bias is applied to the transistors of the peripheral circuit section PC through impurity layers, which is less than the thickness of the silicon oxide layer.
Abstract: Silicon oxide layers are provided in a substrate. That part of the silicon oxide layer which is located in a memory cell section MC has a thickness. That part of the silicon oxide layer which is located in a peripheral circuit section PC has a thickness, which is less than the thickness. The memory cell section MC has transistors, each having a source region and a drain region which contact the silicon oxide layer. The peripheral circuit section PC has transistors, each having a source region and a drain region which are spaced apart from the silicon oxide layer. The transistors of the peripheral circuit section PC are provided in well regions. A back-gate bias is applied to the transistors of the peripheral circuit section PC through impurity layers.

Journal ArticleDOI
TL;DR: In this article, the photodetachment features of SiO2, Si2O3, and SiO4 were analyzed and the vertical detachment energies were determined to be 2.76 (0.10), 2.75 (0.,10), and 3.63 (0,1) eV, respectively.
Abstract: We present an anion photoelectron spectroscopic study of SiO2, Si2O3, and Si2O4. We obtained the photoelectron spectra of these small silicon oxide anion clusters at 4.66 eV photon energy. All the spectra show broad photodetachment features, suggesting that there is considerable geometry change between the anion and the neutral. The vertical detachment energies are determined to be 2.76 (0.10), 2.75 (0.10), and 3.63 (0.1) eV for SiO2-, Si2O3-, and Si2O4-, respectively. The spectrum of Si2O3- shows a weak feature at lower binding energy, suggesting existence of another isomer. The spectra of GeO2- and Ge2O3- are also obtained and are compared to the silicon analogs. They are similar to the silicon oxide species, but both have higher detachment energies, 2.93 (0.07) eV for GeO2- and 3.01 (0.07) eV for Ge2O3-. The Ge2O3- spectrum is consistent with only one isomer. The structure and bonding of these small oxide clusters are discussed.

Journal ArticleDOI
TL;DR: In this article, the formation of voids on the thermally grown (650 °C) ultrathin (∼1 nm) silicon oxide films on the Si(100) surface was investigated by using ultrahigh vacuum scanning tunneling microscopy.
Abstract: The formation of voids on the thermally grown (650 °C) ultrathin (∼1 nm) silicon oxide films on the Si(100) surface was investigated by using ultrahigh vacuum scanning tunneling microscopy. Voids form randomly on the ultrathin oxide film upon thermal annealing at 750 °C. In contrast to void formation observed on thicker (>5 nm) thermal silicon oxide films and that observed on ultrathin (∼1 nm) oxide films formed by room temperature O2 adsorption, the number of voids increases during annealing. We find that Si monomer creation and SiO production compete kinetically in the void formation process.

Journal ArticleDOI
02 Oct 1996-Langmuir
TL;DR: In this article, a binary A−B reaction sequence involving the formation of an alkylsiloxane monolayer through self-assembling from solution (step A) followed by UV/ozone oxidation of the hydrocarbon groups (step B) is presented.
Abstract: A novel procedure for a controlled monolayer growth of silicon oxide films on silicon substrates is presented. It is based on a binary A−B reaction sequence involving the formation of an alkylsiloxane monolayer through self-assembling from solution (step A) followed by UV/ozone oxidation of the hydrocarbon groups (step B). Repeated application of this A−B cycle results in a layer-by-layer growth of the oxide film with a strictly linear thickness increase of 2.7 A per cycle, as evidenced by ellipsometry and infrared reflection spectroscopy.

Journal ArticleDOI
TL;DR: In situ sol-gel chemistry was used to create inorganic/perfluoro-organic hybrids wherein titanium oxide outer regions of SiO2[1-x/4]-x nanoparticles, which were preformed in Nafion® membranes, were determined via x-ray energy dispersive spectroscopy as discussed by the authors.
Abstract: In situ sol-gel chemistry was used to create inorganic/perfluoro-organic hybrids wherein titanium oxide outer regions of SiO2[1—x/4](OH)x nanoparticles, which were preformed in Nafion® membranes, were created by postreaction with tetrabutyltitanate (TBT). U-shaped Si and Ti distributions across the membrane thickness direction were determined via x-ray energy dispersive spectroscopy. Ti/Si ratio profiles are also U-shaped, indicating more Ti relative to Si in near-surface regions. IR spectroscopy verified structural bonding of TiO4 units onto SiO2 nanoparticles and indicated that alkoxide hydrolysis is not complete. Reacted silicon oxide nanophases retain the topological unconnectedness possessed by the corresponding unreacted phase. IR bands signifying molecular loops and linear fragments of Si(SINGLE BOND)O(SINGLE BOND)Si groups are seen. 29Si solid-state NMR spectroscopy indicated that, for an inorganic uptake of 16.3 wt %, the Q3 state of SiO4 is most populated although Q4 is only slightly less prominent and Q2 and Q1 are either small or absent. The silicon oxide component, although not being predominantly linear, retains a measure of uncondensed SiOH groups. Tensile stress vs. strain analyses suggested that TBT postreaction links nanoparticles, causing them to be contiguous over considerable distances. This percolative intergrowth occurs in near-surface regions generating a glassy zone. © 1996 John Wiley & Sons, Inc.

Patent
Tai-su Park1
31 Oct 1996
TL;DR: In this paper, a method for forming a microelectronic structure includes the steps of forming a trench in a substrate and forming an insulating layer which fills the trench and covers the substrate.
Abstract: A method for forming a microelectronic structure includes the steps of forming a trench in a substrate and forming an insulating layer which fills the trench and covers the substrate. Ions can be implanted into the insulating layer which decrease an etch rate of the insulating layer, and portions of the insulating layer on the substrate can be removed while maintaining the insulating layer in the trench. In addition, the step of forming the insulating layer can include forming an undoped oxide layer on the substrate and forming a doped oxide layer on the undoped oxide layer wherein a void is formed in the doped oxide layer. The void can thus be reduced by reflowing the doped oxide layer.

Journal ArticleDOI
TL;DR: In this article, the amount of the energy shift of the substrate Si 2p3/2 peak measured as a function of the bias voltage was analyzed for 3.6-nm-thick silicon oxide/n-Si(100) metal-oxide-semiconductor devices.
Abstract: Interface states in the Si band gap present at oxide/Si(100) interfaces for ∼3‐nm‐thick Pt/2.1∼3.6‐nm‐thick silicon oxide/n‐Si(100) metal–oxide–semiconductor devices are investigated by measurements of x‐ray photoelectron spectra under biases between the Pt layer and the Si substrate, and their energy distribution is obtained by analyzing the amount of the energy shift of the substrate Si 2p3/2 peak measured as a function of the bias voltage. All the interface states observed using this new technique have discrete energy levels, showing that they are due to defect states. For the oxide layer formed in H2SO4+H2O2, the interface states have three density maxima at ∼0.3, ∼0.5, and ∼0.7 eV above the valence‐band maximum (VBM). For the oxide layer produced in HNO3, two density maxima appear at ∼0.3 and ∼0.7 eV above the VBM. The energy distribution for the oxide layer grown in HCl+H2O2 has one peak at ∼0.5 eV. The 0.5 eV interface state is attributed to the isolated Si dangling bond defect. The 0.3 and 0.7 eV ...