Showing papers on "Substrate (electronics) published in 1980"

Characterization of ZnO piezoelectric films prepared by rf planar‐magnetron sputtering

Abstract: ZnO films with an excellent crystal orientation and surface flatness have been prepared by high‐deposition‐rate rf planar‐magnetron sputtering. A detailed study of these films has been carried out using x‐ray diffraction, scanning electron microscopy, reflection electron diffraction, optical measurement, and electromechanical measurement. These films have the c‐axis perpendicular to the substrate. The value of the standard deviation angle σ of the c‐axis orientation distribution is smaller than 0.5°, and the minimum value of σ is 0.35°, where the sputtering conditions are that the gas pressure is 5×10−3–3×10−2 Torr of premixed Ar (50%)+O2(50%) and the substrate temperature is 300–350 °C. ZnO films with a thickness up to 48 μm have been reproducibly prepared without the decreases of film quality and surface flatness. The surface flatness of these films is similar to that of a glass substrate. An optical waveguide loss for the TE0 mode of the He‐Ne 6328‐A line is as low as 2.0 dB/cm in a 4.2‐μm‐thick film, ...

Solution Growth of CdSe and PbSe Films

Abstract: Cadmium selenide and lead selenide films have been deposited by a solution growth technique on single crystal germanium and silicon, glass, mica, and copper substrates. The effect of bath parameters (pH, temperature, and relative concentration of reactants) and the nature of the substrate on the rate of deposition and terminal thickness has been established. The structure of the films has also been studied. Based on the experimental results, a growth model has been proposed.

Chemical Vapor Deposition of Single Crystalline β ‐ SiC Films on Silicon Substrate with Sputtered SiC Intermediate Layer

Abstract: A single crystal of was grown by chemical vapor deposition using an system on a silicon substrate with a sputtered layer. The grown layer of 4 μm thickness was confirmed as a single crystal by examination with reflection electron diffraction and x‐ray diffraction. To reduce the large mismatch between and a silicon substrate, a sputtered layer was employed as a buffer layer. Even though the sputtered layer was polycrystalline, the subsequent layer deposited by CVD was a single crystal. The crystallinity of the deposited layer was strongly affected by the thickness of the sputtered layer, the substrate temperature during sputtering, and the temperature of chemical vapor deposition.

Surface Diffusion by AN Atomic Exchange Mechanism.

Abstract: On Ir(110), tungsten adatoms move preferentially across [$1\overline{1}0$] channels rather than along them, as observed on other channeled planes. The jump mechanism underlying this anomalous behavior has been tested in an atom probe. It is found that after cross-channel motion, an iridium adatom is left on the iridium surface rather than the tungsten originally deposited. These observations provide the first experimental evidence for atomic diffusion on a metal by exchange of the adatom with an atom from the substrate.

Low‐temperature growth of piezoelectric AlN film by rf reactive planar magnetron sputtering

Abstract: A single‐crystalline aluminum nitride film is grown on a basal‐plane sapphire substrate and the c‐axis‐oriented films are grown on glass and gold‐film substrates at substrate temperatures as low as from 50 to 500 °C by using reactive rf planar magnetron sputtering. Surface acoustic waves are generated in both structures where interdigital transducers are located on the top of an aluminum nitride film and at the interface between the film and the substrate sapphire. The effective surface acoustic wave coupling factor k2 is 0.09 and 0.12%, respectively, for these interdigital transducer configurations. The aluminum nitride films sputtered on a gold film on a glass rod and on a glass sheet itself are also piezoelectric and used as bulk and surface acoustic wave transducers, respectively. These piezoelectric aluminum nitride films on glass and metal‐film substrates have become available for the first time because film growth at low temperature has become possible in the present study.

Arsenic precipitation at dislocations in GaAs substrate material

Abstract: High‐resolution diffraction utilizing an analytical electron microscope has been employed to identify small (∼500 A‐diam) precipitates attached to line dislocations in gallium arsenide. The results show that the precipitates consist of crystallites of elemental hexagonal arsenic embedded within the gallium arsenide matrix. Precipitates were observed in a range of semi‐insulating, p‐type, and n‐type material and were not dependent on the presence of specific additional dopants for their occurrence. The way in which the particles may originate is discussed.

Electrical properties of undoped In2O3 films prepared by reactive evaporation

Abstract: Electrical properties of reactively evaporated In2O3 films are studied in relation to evaporation conditions and the carrier scattering mechanism is discussed. The films are made on heated glass substrates by evaporation of In metal in oxygen at about 1*10-3 Torr. The films become polycrystalline above substrate temperature 200 degrees C, showing 75% transparency at 550 nm. Electrical resistivity of the films, rho =2-3*10-3 Omega cm is obtained for substrate temperatures 200-400 degrees C. Hall coefficient measurements show the film to be a n-type conductor and have relatively high mobility, 25.60 cm2 V-1 s-1. The degeneracy of free carriers in the film is established by the high carrier concentration (above 3.5*1019 cm-3) and absence of temperature dependence of electrical properties. Discussion of the mobility-carrier concentration relationship from the experiments and theory leads to the conclusion that the dominant scattering process in the films is due to ionised impurity scattering centres.

Method of making p-doped silicon films

Abstract: The production of improved photovoltaic solar cells and the like comprising both p and n type deposited silicon film regions is made possible by a process which provides more efficient p-doped silicon films with higher acceptor concentrations. The process utilizes previously known p-dopant metal or boron gaseous materials in unique forms and conditions in a glow discharge silicon preferably hydrogen and fluorine compensated deposition process. Thus, p-dopant metals like aluminum may be used in an elemental evaporated form, rather than in a gaseous compound form heretofore ineffectively used and deposited with the glow discharge deposited silicon on substrates kept at lower temperatures where fluorine and hydrogen compensation is most effective. Preferably boron in a gaseous compound form like diborane and other p-dopant metals in a gaseous form are used uniquely during the glow discharge deposition of silicon by heating the substrate to heretofore believed undesirably higher temperatures, like at least about 450° C. to 800° C. where at least fluorine compensation, if desired, is still effective. The improved devices, such as solar cells, can be manufactured in a continuous process on a web type substrate moved through a plurality of film deposition chambers. Each of the chambers is dedicated to depositing a particular type of film layer (p, i or n) and is isolated from the other chambers.

Fundamental, longitudinal, thickness mode bulk wave resonator

Abstract: A substrate (10) is thinned to provide a membrane (12) on which are disposed a counter electrode (20), a film of low conductivity piezoelectric material (22) and a top electrode (24) to form a half wavelength, bulk mode resonator employing a longitudinal acoustic wave. A second top electrode (25) provides a second resonator acoustically coupled to the first, to form a filter. Piezoelectric films include zinc oxide, and aluminum nitride; substrates include silicon and aluminum oxide. A buffer layer (18), such as silicon dioxide may assist in preventing surface aberations and providing proper crystallographic orientation.

Silicon graphoepitaxy using a strip-heater oven

Abstract: Silicon graphoepitaxy has been achieved using a strip‐heater oven and a sample configuration consisting of a relief grating in a SiO2 substrate, a deposited amorphous silicon film, and a deposited SiO2 overlayer or ’’cap.’’ The resulting films are free of cracks and superior in crystallographic orientation and surface smoothness to graphoepitaxial films produced by laser crystallization. Enhancement‐mode, n‐channel, insulated polysilicon gate field‐effect transistors were fabricated and gave surface mobilities of 400 cm2/V sec at a p doping of 1016 cm−3. A SiO2 cap, either intentionally deposited or produced by laser crystallization in the presence of oxygen, was found to be necessary for Si graphoepitaxy. We attribute this effect to shear stresses produced by the SiO2 cap during crystallization.

Solar cells and methods for manufacture thereof

Abstract: An improved light transducer such as a solar cell and, especially, a concentrator solar cell, together with processes for forming the same which permit the formation of improved light transducers characterized by their high thermal stability and by optimized impurity atom dispersion zones at the surface of either a p-type or an n-type substrate--such, for example, as a silicon substrate--defining: (i) a thermally stable deep junction with relatively high surface concentrations of dopant dispersed in those areas where metallic electrodes are to be formed, thus providing excellent ohmic contact characteristics in such areas; and (ii), an efficient energy conversion shallow junction with relatively lower surface concentrations of dopant in the inter-electrode photoactive regions of the cell, with such inter-electrode photoactive regions preferably being texturized, thereby optimizing current generation per unit of incident radiation and minimizing reflection losses. More particularly, a deep junction (on the order of 0.5 μm or greater) is first formed throughout the substrate's entire near-surface area which is to be exposed to incident radiation; such deep junction is then entirely removed in the inter-electrode regions of the substrate by subjecting such regions to an acid etch, preferably with a texturizing etchant but, in some instances, with a polish etchant; and, a relatively uniform shallow junction (on the order of 0.3 μm±0.1 μm) is then formed in the etched inter-electrode near-surface regions either (i) by subjection of the substrate to a gas diffusion dopant process, or (ii), by conventional ion implantation techniques.

Low temperature process for depositing oxide layers by photochemical vapor deposition

Abstract: The specification discloses a low temperature process for depositing oxide layers on a substrate by photochemical vapor deposition, by exposing the substrate to a selected vapor phase reactant in the presence of photochemically generated neutral (un-ionized) oxygen atoms. The oxygen atoms react with the vapor phase reactant to form the desired oxide, which deposits as a layer on the substrate. The use of photochemically generated neutral oxygen atoms avoids damage to the substrate due to charge bombardment or radiation bombardment of the substrate. The deposited oxide layer may optionally incorporate a selected dopant material in order to modify the physical, electrical, or optical characteristics of the oxide layer.

Method of making high density semiconductor device such as floating gate electrically programmable ROM or the like

Abstract: An improved method of making a semiconductor device such as an N-channel, double level poly, MOS read only memory or ROM array is provided; the array is of very dense structure and may be electrically programmable by floating gates which are interposed between the gate oxide and control gates formed by polycrystalline silicon or metal row address lines. The electrical programming of the cells is accomplished by applying selected voltages to the source, drain, control gate and substrate. The very dense array results from a simplified manufacturing process generally compatible with standard N-channel silicon gate technology. Parallel strips of gate oxide, polycrystalline silicon, and nitride (functioning as an oxidation mask) are created in one mask step before field oxide is grown, then a perpendicular pattern of conductive strips is etched using a second mask step.

Growth of CuInSe2 by molecular beam epitaxy

Abstract: We have used molecular beam epitaxy to grow CuInSe2 layers on CdS (0001B) and other substrates. Epitaxial growth is obtained at a substrate temperature of 300 °C. The ratio of the arrival rates of copper to indium is the key parameter governing layer stoichiometry. In order to produce low‐resistivity p‐type layers, the Cu/In arrival rate ratio must be slightly higher than that used to grow nominally stoichiometric layers. This suggests that a different defect is controlling electrical properties, rather than the copper vacancy complex which dominates bulk material. We have fabricated CuInSe2/CdS heterojunctions which show a maximum solar conversion efficiency of ∼5%.

Manufacture of semiconductor device

Abstract: PROBLEM TO BE SOLVED: To enable efficient manufacturing of a light-emitting diode and provide stable die bonding strength and ohmic contact. SOLUTION: Conductive solder materials 13 and 14 having different melting points are provided on opposite surfaces of a silicon substrate 12. The silicon substrate 12 is set on a stem 11 via the solder material 13 having a high melting point, and a light-emitting diode element 15 is set via the other solder material 14 having a low melting point on the silicon substrate 12. While the stem 11 is heated by a heater, the light-emitting diode 15 is pressed to the stem 11. Since the solder material 13 in contact with the stem 11 has a high melting point, it is melted substantially at the same time as the other solder material 14 having a low melting point so that the stem 11 and the silicon substrate 12 are die-bonded to form eutectic junction, and at the same time, the silicon substrate 12 and a semiconductor element are die-bonded to form an eutectic junction.

Twin-tub CMOS - A technology for VLSI circuits

Abstract: CMOS technology has been developed through several generations of design rules with an n-type substrate (where p-channel transistors were formed) and with a p-tub implanted and diffused region (where n-channel transistors were formed). In order to enable a separate optimization of both transistors and to utilize the dopant control available with implanted layers, a two-tub approach was adopted. Utilizing lightly doped epi on an n+substrate (for latch-up protection), nitride-masked self-aligned tubs, 1016cm-3surface doping and 600A gate oxides, an 8-mask CMOS process (named 'Twin-Tub") was formulated. The combination of n on n+epi and careful I/O layout renders the circuits latch-up free. Novel aspects of the process, the devices it produces and finally the resultant circuit performance are herein described.

Multilayer photovoltaic cell

Abstract: A new high efficiency, multijunction photovoltaic solar cell for use with a concentrating lens. This cell comprises an elemental single crystal substrate without an internal light sensitive junction, upon which are two or more successive homogenous layers of semiconductor material, each layer containing within it a light sensitive p/n junction of a similar polarity, each layer having essentially the same lattice constant as the single crystal substrate, each layer having a shorting junction contact with the layer immediately above and below it, each successive layer adsorbing light energy at a shorter wavelength, and each layer being of sufficient thickness and appropriate composition to develop essentially the same current as the other layers. The outer surfaces of the top layer and the substrate are provided with electrical contacts for distribution of the electric current. The top contact comprises a layer of a transparent conductive material with electrical connections and the whole structure is completed with an antireflection coating over the top.

Polymerized solutions for depositing optical oxide coatings

Abstract: A clear solution is prepared by reacting metal alkoxide with a mixture of critical amounts of water and/or acid in an alcohol diluted medium. Alkoxides may be Ti(OR) 4 or Ta(OR) 5 , or another metal alkoxide such as Si(OR) 4 in admixture with these alkoxides. Acids may be HCl or HNO 3 . Quarter wave inorganic optical coatings are deposited by applying the alkoxide solution to a substrate then heating the coating at over 350° C. The coatings reduce reflectivity on silicon solar cells. The index of refraction of the coating can be varied by several techniques, including altering the proportion of titanium and silicon in the coating firing temperature, firing atmosphere. Thicknesses of the coating can be controlled by varying the rpm in spin application, withdrawal rate in dipping application, by concentration of the solution, by the type of solvent or the degree of polymerization of the titanium complexes.

Diffusion enhancement due to low‐energy ion bombardment during sputter etching and deposition

Abstract: The effects of low‐energy ion bombardment on enhancing elemental diffusion rates at both heterojunction interfaces during film deposition and over the compositionally altered layer created during sputter etching alloy targets have been considered. Depth dependent enhanced interdiffusion coefficients, expressed as D*(x)=D*(0) exp(−x/Ld), where D*(0) is more than five orders of magnitude greater than thermal diffusion values, were measured in InSb/GaSb multilayer structures deposited by multitarget bias sputering. D*(0) was determined from the amplitude u of the compositional modulation in the multilayered films (layer thicknesses between 20 and 45 A) as measured by superlattice x‐ray diffraction techniques. The value of D*(0) was found to increase from 3×10−17 to 1×10−16 cm2/sec as the applied substrate bias was increased from 0 to −75 V. However even at Va=0, the diffusion coefficient was enhanced owing to an induced substrate potential with respect to the positive space‐charge region in the Ar discharge....

Glow discharge preparation of amorphous hydrogenated silicon from higher silanes

Abstract: Amorphous hydrogenated silicon has been deposited by plasma decomposition of Si2H6 and Si3H8. A major feature of the process is a deposition rate enhancement of over a factor of 20 compared to monosilane. The resulting films are compositionally similar to monosilane‐produced intrinsic a‐Si(H), but films deposited at 300 °C substrate temperature show greater photoconductivity. On the basis of our deposition experiments and the known thermolysis chemistry of the silanes, a conjectural model for the deposition process is presented.

The effect of substrate temperature on the current threshold of GaAs‐AlxGa1−xAs double‐heterostructure lasers grown by molecular beam epitaxy

Abstract: The current threshold densities (Jth) of broad‐area double‐heterostructure (DH) lasers, the photoluminescence (PL) intensities of the p‐GaAs cap layers, P‐AlxGa1−xAs (x∼0.3) confinement layers, and the GaAs active layers of the DH wafers are investigated as a function of the substrate temperature (450–650 °C) during MBE growth. The PL intensities of the P‐AlxGa1−xAs (x∼0.3) confinement layers and the GaAs active layers increase and the Jth’s of the DH lasers decrease with increasing substrate temperature. The improvement of Jth with increasing substrate temperature is found to be well correlated to the improvement of the optical qualities of the AlxGa1−xAs layers with increasing substrate temperature. However, the PL intensities of the p‐GaAs cap layers are relatively independent of substrate temperature.