In this paper, recent progress of binary metal-oxide resistive switching random access memory (RRAM) is reviewed. The physical mechanism, material properties, and electrical characteristics of a variety of binary metal-oxide RRAM are discussed, with a focus on the use of RRAM for nonvolatile memory application. A review of recent development of large-scale RRAM arrays is given. Issues such as uniformity, endurance, retention, multibit operation, and scaling trends are discussed.

Metal–Oxide RRAM

International Technology Roadmap for Semiconductors 2003の要求清浄度について － シリコンウエハ表面と雰囲気環境に要求される清浄度, 分析方法の現状について －

http://www.acsu.buffalo.edu/~jmjornet/papers/2014/j1.pdf

Full length article: Terahertz band: Next frontier for wireless communications

Before the emergence of ultra-wideband (UWB) radios, widely used wireless communications were based on sinusoidal carriers, and impulse technologies were employed only in specific applications (e.g. radar). In 2002, the Federal Communication Commission (FCC) allowed unlicensed operation between 3.1–10.6 GHz for UWB communication, using a wideband signal format with a low EIRP level (−41.3dBm/MHz). UWB communication systems then emerged as an alternative to narrowband systems and significant effort in this area has been invested at the regulatory, commercial, and research levels.

IEEE Transactions on Microwave Theory and Techniques and Antennas and Propagation Announce a Joint Special Issue on Ultra-Wideband (UWB) Technology

Hybrid silicon lasers based on bonded III–V layers on silicon are currently the best contenders for on-chip lasers for silicon photonics. On-chip silicon light sources are highly desired for use as electrical-to-optical converters in silicon-based photonics. Zhiping Zhou and Bing Yin of Peking University in China and Jurgen Michel of Massachusetts Institute of Technology assess the three main contenders for such light sources: erbium-based light sources, germanium-on-silicon lasers and III-V-based silicon lasers. They consider operating wavelength, pumping conditions, power consumption, thermal stability and fabrication process. The scientists regard the power efficiencies of electrically pumped erbium-based lasers as being too low and the threshold currents of germanium lasers as being too high. They conclude that III–V quantum dot lasers monolithically grown on silicon show the most promise for realizing on-chip lasers.

/pdf/on-chip-light-sources-for-silicon-photonics-ky23qv18q4.pdf

On-chip light sources for silicon photonics

The integration of lattice mismatched semiconductors on Si(001) is of fundamental importance to further increase the performance and/or functionality of today’s Si integrated circuits The theory of compliant substrate effects offers the vision to integrate defect-free alternative semiconductor structures on Si This concept is based on balancing the mismatch strain between the overgrowing epitaxial semiconductor and the Si substrate by a strain partitioning phenomenon Using the Ge/Si heterosystem as a case study, we report by advanced 3rd generation synchrotron as well as laboratory techniques for materials characterization on the nanoscale clear experimental evidence for the compliance of Si nanoislands on SOI for selective Ge nanoheteroepitaxy This integration concept is not limited to Ge but extendable to semiconductors like III-V and II-VI materials

Compliant Si nanostructures on SOI for Ge nanoheteroepitaxy—A case study for lattice mismatched semiconductor integration on Si(001)

This paper presents a 330 GHz hetero-integrated signal source using InP-on-BiCMOS technology. It consists of a fundamental Voltage Controlled Oscillator (VCO) in 0.25 µm BiCMOS technology and a frequency quadrupler in 0.8 µm transferred substrate (TS) InP-HBT technology, which is integrated on top of the BiCMOS MMIC in a wafer-level BCB bonding process. The fundamental VCO operates at 82 GHz and the combined source delivers −12 dBm output power at 328 GHz. To the knowledge of the authors, this is the first hetero-integrated signal source in the frequency range beyond 300 GHz reported so far. It demonstrates the potential of the hetero-integration process for THz frequencies.

A 330 GHz hetero-integrated source in InP-on-BiCMOS technology

Silicon epitaxy on wafers is becoming more and more important for substrates in CMOS mass production, and has traditionally been used for bipolar and BiCMOS devices. This paper presents a new process solution in a vertical low-pressure chemical vapor deposition reactor allowing low cost batch processing for deposition of thin Silicon epitaxial layers at temperatures not exceeding 800°C. In situ cleaning of wafers in the reactor prior to the SiH4 deposition process shows significant influence on the quality of epitaxial layers. The problem of deposition on hot reactor walls has been solved by integration of remote plasma enhanced dry etching. We will present test results demonstrating the capabilities of the epitaxy process in this new tool. Finally, cost of ownership calculations will be presented showing the economic attraction of this new solution in comparison with single-wafer high temperature techniques.

Low temperature Si epitaxy in a vertical LPCVD batch reactor

This paper presents a dual-band millimeter-wave VCO utilizing RF-MEMS switches fully integrated into a standard BiCMOS process. The switch and associated transmission line form a reconfigurable inductor in the VCO core. Depending on the state of the switch, the VCO frequency can be tuned either from 48 to 52 GHz, or from 64 to 72 GHz. The VCO provides both fundamental and frequency-divided (divide by 64) outputs, with integrated frequency dividers. The fundamental output power is 4/5 dBm and the phase noise at 1 MHz offset is −84/−86 dBc/Hz for the lower/upper bands. To the authors' knowledge, this is the first millimeter-wave, dual-band VCO with fully integrated RF-MEMS switches.

/pdf/dual-band-millimeter-wave-vco-with-embedded-rf-mems-switch-l9j67osxek.pdf

Dual-band millimeter-wave VCO with embedded RF-MEMS switch module in BiCMOS technology

We report a detailed structure and defect characterization study on gallium phosphide (GaP) layers integrated on silicon (Si) (001) via silicon-germanium (SiGe) buffer layers. The presented approach uses an almost fully relaxed SiGe buffer heterostructure of only 400 nm thickness whose in-plane lattice constant is matched to GaP—not at room but at GaP deposition temperature. Single crystalline, pseudomorphic 270 nm thick GaP is successfully grown by metalorganic chemical vapour deposition on a 400 nm Si0.85Ge0.15/Si(001) heterosystem, but carries a 0.08% tensile strain after cooling down to room temperature due to the bigger thermal expansion coefficient of GaP with respect to Si. Transmission electron microscopy (TEM) studies confirm the absence of misfit dislocations in the pseudomorphic GaP film but growth defects (e.g., stacking faults, microtwins, etc.) especially at the GaP/SiGe interface region are detected. We interpret these growth defects as a residue of the initial 3D island coalescence phase o...

Bernd Tillack

Papers

Compliant Si nanostructures on SOI for Ge nanoheteroepitaxy—A case study for lattice mismatched semiconductor integration on Si(001)

A 330 GHz hetero-integrated source in InP-on-BiCMOS technology

Low temperature Si epitaxy in a vertical LPCVD batch reactor

Dual-band millimeter-wave VCO with embedded RF-MEMS switch module in BiCMOS technology

Lattice-engineered Si1-xGex-buffer on Si(001) for GaP integration