D.A. Antoniadis

TL;DR: In this paper, the carrier mobility enhancement of surface channel MOSFETs is studied as a function of channel strain, and the saturation behavior for n- and p-channel devices is compared.

TL;DR: In this paper, a non-local quantum tunneling model was used to compare the performance of HTFETs to MOSFET with similar technology parameters and the simulations showed that the potential for low-operating-voltage (Vdd < 0.5 V) application and exhibit steep subthreshold swing over many decades while maintaining high ON-state currents.

TL;DR: In this article, a simple semi-empirical model ID(VGS, VDS) for short-channel MOSFETs applicable in all regions of device operation is presented.

TL;DR: In this article, the authors achieved peak hole mobility enhancement factors of 5.15 over bulk Si in metal-oxide-semiconductor field effect transistors (MOSFETs) by combining tensile strained Si surface channels and compressively strained 80% Ge buried channels grown on relaxed 50% Ge virtual substrates.

TL;DR: Channel material innovations that will be required in order to maintain continued commensurate scaling beyond what can be achieved with process-induced strain are examined, and some of the technological tradeoffs that will have to be faced for their introduction are discussed.