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D. De Ceuster

Researcher at Université catholique de Louvain

Publications -  7
Citations -  264

D. De Ceuster is an academic researcher from Université catholique de Louvain. The author has contributed to research in topics: CMOS & Operational amplifier. The author has an hindex of 5, co-authored 7 publications receiving 248 citations. Previous affiliations of D. De Ceuster include Katholieke Universiteit Leuven.

Papers
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Design of SOI CMOS operational amplifiers for applications up to 300/spl deg/C

TL;DR: In this article, design guidelines using two analog parameters (Early voltage and transconductance to drain current ratio) are proposed for correct operation of silicon-on-insulator (SOI) CMOS operational amplifiers (opamp) at elevated temperature up to 300/spl deg/C.
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Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits

TL;DR: In this article, the authors demonstrate that FD SOI MOSFETs exhibit near-ideal body factor, sub-threshold slope and current drive properties for mixed fabrication and operation under low supply voltage of analog, digital and microwave components.
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Comparison of SOI versus bulk performances of CMOS micropower single-stage OTAs

TL;DR: In this paper, the performance of micropower single-stage CMOS OTAs implemented in SOI or bulk technologies is compared and the improvements resulting from the superior device characteristics of fully-depleted SOI MOSFETs are discussed.
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Improved LOCOS isolation for thin-film SOI MOSFETs

TL;DR: In this paper, a recessed LOCOS technique instead of a standard LOCOS process was proposed to eliminate parasitic edge transistor leakage in thin-film SOI MOSFETs.
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Improvement of SOI MOS current-mirror performances using serial-parallel association of transistors

TL;DR: In this article, the serial-parallel association of SOI MOSFETs proves to be useful for increasing the breakdown voltage and the early voltage of transistor structures, allowing one to realize current mirrors with an output-to-input current ratio close to unity in the weak, moderate and strong inversion regimes of the MOS FETs.