Journal ArticleDOI
Design of SOI CMOS operational amplifiers for applications up to 300/spl deg/C
TLDR
In this article, design guidelines using two analog parameters (Early voltage and transconductance to drain current ratio) are proposed for correct operation of silicon-on-insulator (SOI) CMOS operational amplifiers (opamp) at elevated temperature up to 300/spl deg/C.Abstract:
Design guidelines using two analog parameters (Early voltage and transconductance to drain current ratio) are proposed for correct operation of silicon-on-insulator (SOI) CMOS operational amplifiers (opamp) at elevated temperature up to 300/spl deg/C The dependence of these parameters on temperature is first described A new single-stage CMOS opamp model using only these two parameters is presented and compared to measurements of several implementations operating up to 300/spl deg/C for applications such as micropower (below 4 /spl mu/W at 12 V supply voltage), high gain (65 dB) or high frequency up to 100 MHz Trade-offs among such factors as gain, bandwidth, phase margin, signal swing, noise, matching, slew rate and power consumption are described The extension to other architectures is suggested and the design methodology is valid for bulk as well as SOI CMOS opampsread more
Citations
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Journal ArticleDOI
Fully-depleted SOI CMOS for analog applications
TL;DR: In this article, the FD SOI MOSFETs offer near-ideal properties for analog applications, in particular their high transconductance to drain current ratio allows one to obtain a higher gain than from bulk devices, and the reduced body effect permits one to fabricate more efficient pass gates.
Journal ArticleDOI
Laterally asymmetric channel engineering in fully depleted double gate SOI MOSFETs for high performance analog applications
TL;DR: In this article, an analytical model is developed for laterally asymmetric channel (GQ design in double gate (DG) silicon-on-insulator (SOI) MOSFETs.
Proceedings ArticleDOI
Body-driving as a low-voltage analog design technique for CMOS technology
TL;DR: An overview of circuit topologies for achieving low-voltage analog designs using body-driving techniques is presented in this paper, along with a new lowvoltage Class AB output stage along with topology for amplifiers and a four quadrant multiplier.
Journal ArticleDOI
Fully-depleted SOI CMOS technology for heterogeneous micropower, high-temperature or RF microsystems
Denis Flandre,Stéphane Adriaensen,A. Akheyar,André Crahay,Laurent Demeûs,P. Delatte,Vincent Dessard,Benjamin Iniguez,Amaury Nève,B Katschmarskyj,Pierre Loumaye,J. Laconte,I. Martinez,G. Picun,E. Rauly,Christian Renaux,D. Spôte,M Zitout,Morin Dehan,Bertrand Parvais,Pascal Simon,D. Vanhoenacker,Jean-Pierre Raskin +22 more
TL;DR: Based on an extensive review of research results on the material, process, device and circuit properties of thin-film fully depleted SOI CMOS, the authors demonstrates that such a process with channel lengths of about 1 mum may emerge as a most promising and mature contender for integrated microsystems which must operate under lowvoltage low-power conditions, at microwave frequencies and/or in the temperature range 200-350 degreesC.
Journal ArticleDOI
Improved synthesis of gain-boosted regulated-cascode CMOS stages using symbolic analysis and gm/ID methodology
TL;DR: In this paper, a systematic study of the gain-boosted regulated-cascode operational transconductance amplifier (OTA) CMOS stage is presented, where the pole-zero behavior is described and design criteria for optimal settling time are proposed.
References
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Book
Analysis and Design of Analog Integrated Circuits
Paul R. Gray,Robert G. Meyer +1 more
TL;DR: In this article, the authors combine bipolar, CMOS and BiCMOS analog integrated circuits into a unified treatment that stresses their commonalities and highlights their differences, and provide valuable insights into the relative strengths and weaknesses of these important technologies.
Book
Operation and modeling of the MOS transistor
TL;DR: In this article, the MOS transistors with ION-IMPLANTED CHANNELS were used for CIRCUIT SIMULATION in a two-and three-tier MOS structure.
Book
Silicon-on-Insulator Technology: Materials to VLSI
TL;DR: In this paper, the authors present a set of techniques for defect detection in SOI materials, including the following: 2.1.1 Silicon-on-Zirconia (SOZ), 2.2.2 E-beam recrystallization, 2.3.3, 3.4.4, and 3.5.5 Other defect assessment techniques.
Book
Design of analog integrated circuits and systems
Kenneth R. Laker,Willy Sansen +1 more
TL;DR: MOS transistor models bipolar transistor models feedback and sensitivity in analogue integrated circuits elementary transistor stages behavioural modelling of operational and transconductance amplifiers operational amplifier design fundamentals of continuous-time and sampled-data active filters design and implementation of integrated active filters.