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Heng-Yuan Lee

Researcher at Industrial Technology Research Institute

Publications -  95
Citations -  5401

Heng-Yuan Lee is an academic researcher from Industrial Technology Research Institute. The author has contributed to research in topics: Resistive random-access memory & Non-volatile memory. The author has an hindex of 27, co-authored 94 publications receiving 4576 citations. Previous affiliations of Heng-Yuan Lee include National Tsing Hua University & Minghsin University of Science and Technology.

Papers
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Journal ArticleDOI

Resistance switching for RRAM applications

Frederick T. Chen, +14 more
- 05 May 2011 - 
TL;DR: This paper presents the current understanding of RRAM technology, and indicates that the data stability against high temperature and cycling wear is very robust, allowing new NVM applications in a variety of markets.
Journal ArticleDOI

Good Endurance and Memory Window for $ \hbox{Ti/HfO}_{x}$ Pillar RRAM at 50-nm Scale by Optimal Encapsulation Layer

Yu-Sheng Chen, +10 more
- 31 Jan 2011 - 
TL;DR: In this article, a scaling feasibility for the process integration of the Ti/HfOx, resistance memory with pillar structure is studied, and an empirical model is successfully developed to correlate the forming voltage of devices to their cell sizes.
Journal ArticleDOI

Three-Dimensional $\hbox{4F}^{2}$ ReRAM With Vertical BJT Driver by CMOS Logic Compatible Process

Ching-Hua Wang, +10 more
- 14 Jul 2011 - 
TL;DR: In this paper, a 3D vertical bipolar junction transistor (BJT) resistive-switching memory (ReRAM) cell with complimentary metaloxide-semiconductor compatible process has been demonstrated and characterized.
Journal ArticleDOI

Improved Bipolar Resistive Switching of HfOx/TiN Stack with a Reactive Metal Layer and Post Metal Annealing

Pang-Shiu Chen, +6 more
- 20 Apr 2010 - 
TL;DR: In this article, the Gibbs free energy for the oxidation of the reactive metal with respect to that of HfO2 dominates the optimal PMA temperature for the devices with stable BRS.
Proceedings ArticleDOI

Sub-nA Low-Current HZO Ferroelectric Tunnel Junction for High-Performance and Accurate Deep Learning Acceleration

Tzu-Yun Wu, +13 more
TL;DR: This paper analyzes an FTJ-based deep binary neural network that achieves better accuracy and remarkable 702, 101, and 7×104 times improvements in power, area, and energy-area product efficiency compared with those using NVMs with a typical μA cell current designed for fast memory access.