Cryptosystem designers frequently assume that secrets will be manipulated in closed, reliable computing environments. Unfortunately, actual computers and microchips leak information about the operations they process. This paper examines specific methods for analyzing power consumption measurements to find secret keys from tamper resistant devices. We also discuss approaches for building cryptosystems that can operate securely in existing hardware that leaks information.

/pdf/differential-power-analysis-4t7fjmuc7b.pdf

Differential Power Analysis

This monograph provides an overview of general deep learning methodology and its applications to a variety of signal and information processing tasks. The application areas are chosen with the following three criteria in mind: (1) expertise or knowledge of the authors; (2) the application areas that have already been transformed by the successful use of deep learning technology, such as speech recognition and computer vision; and (3) the application areas that have the potential to be impacted significantly by deep learning and that have been experiencing research growth, including natural language and text processing, information retrieval, and multimodal information processing empowered by multi-task deep learning.

/pdf/deep-learning-methods-and-applications-5cyi610sjz.pdf

Deep Learning: Methods and Applications

This ebook is the first authorized digital version of Kernighan and Ritchie's 1988 classic, The C Programming Language (2nd Ed.). One of the best-selling programming books published in the last fifty years, "K&R" has been called everything from the "bible" to "a landmark in computer science" and it has influenced generations of programmers. Available now for all leading ebook platforms, this concise and beautifully written text is a "must-have" reference for every serious programmers digital library.

As modestly described by the authors in the Preface to the First Edition, this "is not an introductory programming manual; it assumes some familiarity with basic programming concepts like variables, assignment statements, loops, and functions. Nonetheless, a novice programmer should be able to read along and pick up the language, although access to a more knowledgeable colleague will help."

The C programming language

Recently, the hybrid deep neural network (DNN)- hidden Markov model (HMM) has been shown to significantly improve speech recognition performance over the conventional Gaussian mixture model (GMM)-HMM. The performance improvement is partially attributed to the ability of the DNN to model complex correlations in speech features. In this paper, we show that further error rate reduction can be obtained by using convolutional neural networks (CNNs). We first present a concise description of the basic CNN and explain how it can be used for speech recognition. We further propose a limited-weight-sharing scheme that can better model speech features. The special structure such as local connectivity, weight sharing, and pooling in CNNs exhibits some degree of invariance to small shifts of speech features along the frequency axis, which is important to deal with speaker and environment variations. Experimental results show that CNNs reduce the error rate by 6%-10% compared with DNNs on the TIMIT phone recognition and the voice search large vocabulary speech recognition tasks.

/pdf/convolutional-neural-networks-for-speech-recognition-59lskxzlgf.pdf

Convolutional neural networks for speech recognition

From the Publisher:
Connectionist Speech Recognition: A Hybrid Approach describes the theory and implementation of a method to incorporate neural network approaches into state-of-the-art continuous speech recognition systems based on Hidden Markov Models (HMMs) to improve their performance. In this framework, neural networks (and in particular, multilayer perceptrons or MLPs) have been restricted to well-defined subtasks of the whole system, i.e., HMM emission probability estimation and feature extraction. The book describes a successful five year international collaboration between the authors. The lessons learned form a case study that demonstrates how hybrid systems can be developed to combine neural networks with more traditional statistical approaches. The book illustrates both the advantages and limitations of neural networks in the framework of a statistical system. Using standard databases and comparing with some conventional approaches, it is shown that MLP probability estimation can improve recognition performance. Other approaches are discussed, though there is no such unequivocal experimental result for these methods. Connectionist Speech Recognition: A Hybrid Approach is of use to anyone intending to use neural networks for speech recognition or within the framework provided by an existing successful statistical approach. This includes research and development groups working in the field of speech recognition, both with standard and neural network approaches, as well as other pattern recognition and/or neural network researchers. This book is also suitable as a text for advanced courses on neural networks or speech processing.

Connectionist Speech Recognition: A Hybrid Approach

In this paper, a closed form expression for the propagation delay of MOS current mode logic (MCML) is derived using simplified BSIM transistor equations. The expression shows the parameters that affect the delay. Based on the obtained expression, a design approach is devised that leads to minimum power dissipation in MOS current mode logic gates for a given gate delay and load. This approach can serve as the basis for an automated methodology to size power efficient MCML gates that are extensively used in integrated optical transceivers.

A low power design approach for MOS current mode logic

A new implementation for the Viterbi (1967) decoder (VD) based on the register-exchange (RE) method is described. Conceptually, the RE method is simpler and faster than the traceback (TB) method, but its disadvantage is that every bit in the memory must be read and rewritten for each bit decoded. Using the 'pointer' concept; a pointer is assigned to each register. Instead of copying the contents of one register to another, the pointers are modified. Power dissipation, performance, memory size, and the speed of the survivor memory unit (SMU) are analyzed for both the proposed RE method and the TB method, described in the literature for the next generation wireless applications. The new implementation shows an average power reduction of 45 percent. The BER is 10/sup -5/ at a SNR around 6.1 dB for a continuous uncontrolled encoded sequence. The memory is reduced by half and all read and write operations in the SMU are executed at the data rate frequency.

Low-power register-exchange Viterbi decoder for high-speed wireless communications

A novel low-power direct digital frequency synthesizer (DDFS) architecture is presented. The sine and cosine functions are generated by linearly interpolating between the sample points, reducing the size of the ROM look-up table to 416 bits for 9-bit output resolution. The DDFS is implemented in 0.8 /spl mu/m CMOS technology and features 60 dBc spectral purity, 48 Hz frequency resolution, with only 9.5 mW (@30 MHz, 3.3 V) power dissipation.

https://ieeexplore.ieee.org/iel5/6310/16877/00777351.pdf

A low-power direct digital frequency synthesizer architecture for wireless communications

Dc analysis of integrated injection logic structures is performed. The analysis is bared on partitioning the basic I2L structure into injection and n-p-n transistor regions. One-dimensional approximation is assumed in obtaining the intrinsic and the extrinsic β u of the n-p-n transistor. The electric field in the epiregion has been considered and the analysis predicts the behavior of β u at an arbitrary current level. An effective efficiency λ for the injection region is also given. The results of the analysis are compared to practical measurements.

Mohamed I. Elmasry

Papers

A low power design approach for MOS current mode logic

Low-power register-exchange Viterbi decoder for high-speed wireless communications

A low-power direct digital frequency synthesizer architecture for wireless communications

Functional modeling of integrated injection logic—DC analysis

Impact of technology scaling and process variations on RF CMOS devices

Mohamed I. Elmasry

Papers

A low power design approach for MOS current mode logic

Low-power register-exchange Viterbi decoder for high-speed wireless communications

A low-power direct digital frequency synthesizer architecture for wireless communications

Functional modeling of integrated injection logic&#8212;DC analysis

Impact of technology scaling and process variations on RF CMOS devices

Functional modeling of integrated injection logic—DC analysis