O
O. Kallensee
Researcher at GlobalFoundries
Publications - 5
Citations - 66
O. Kallensee is an academic researcher from GlobalFoundries. The author has contributed to research in topics: Computer science & JEDEC memory standards. The author has an hindex of 2, co-authored 2 publications receiving 27 citations.
Papers
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Proceedings ArticleDOI
Manufacturable 22nm FD-SOI Embedded MRAM Technology for Industrial-grade MCU and IOT Applications
Vinayak Bharat Naik,J. H. Lim,Tae Young Lee,W. P. Neo,Hemant Dixit,L. C. Goh,T. Ling,J. Hwang,D. Zeng,J. W. Ting,Kangho Lee,Eng Huat Toh,L. Zhang,R. Low,N. Balasankaran,L. Y. Zhang,K. W. Gan,L. Y. Hau,Johannes Mueller,B. Pfefferling,O. Kallensee,K. Yamane,S. L Tan,Chim Seng Seet,Y. S. You,S. T. Woo,E. Quek,S. Y. Siah,John Pellerin,R. Chao,J. Kwon,Naganivetha Thiyagarajah,N. L. Chung,S. H. Jang,Behtash Behin-Aein +34 more
TL;DR: In this paper, a manufacturable 22nm FD-SOI 40Mb embedded MRAM (eMRAM) was demonstrated to achieve product functionality and reliability at package level across industrial-grade operating temperature range (−40 to 125 °C) with ECC-off mode.
Proceedings ArticleDOI
JEDEC-Qualified Highly Reliable 22nm FD-SOI Embedded MRAM For Low-Power Industrial-Grade, and Extended Performance Towards Automotive-Grade-1 Applications
Vinayak Bharat Naik,K. Yamane,Tae Young Lee,J. Kwon,R. Chao,J. H. Lim,N. L. Chung,Behtash Behin-Aein,L. Y. Hau,D. Zeng,Y. Otani,C. Chiang,Y. Huang,L. Pu,S. H. Jang,W. P. Neo,Hemant Dixit,S. K L. C. Goh,Eng Huat Toh,T. Ling,J. Hwang,J. W. Ting,R. Low,L. Zhang,C.G. Lee,N. Balasankaran,F. Tan,K. W. Gan,H. Yoon,G. Congedo,Johannes Mueller,B. Pfefferling,O. Kallensee,A. Vogel,V. Kriegerstein,T. Merbeth,Chim Seng Seet,S. Ong,Jeff J. Xu,Jen Shuang Wong,Y. S. You,S. T. Woo,T. H. Chan,E. Quek,Soh Yun Siah +44 more
TL;DR: In this paper, the authors demonstrate highly reliable and mass-production ready 22nm FD-SOI 40Mb embedded-MRAM for industrial-grade (-40~125°C) applications.
Proceedings ArticleDOI
Extended MTJ TDDB Model, and Improved STT-MRAM Reliability With Reduced Circuit and Process Variabilities
Vinayak Bharat Naik,K. Yamane,J. Kwon,Behtash Behin-Aein,N. L. Chung,R. Chao,C. Chiang,Y. Huang,L. Pu,Yuichi Otani,S. H. Jang,N. Balasankaran,Wah-Peng Neo,Tan Yun Ling,J. W. Ting,Hongsik Yoon,Johannes Müller,B. Pfefferling,O. Kallensee,T. Merbeth,Chim Seng Seet,J. Wong,Y. S. You,Steven R. Soss,T. H. Chan,Soh Yun Siah +25 more
TL;DR: In this article , the authors present a reliable magnetic tunnel junction (MTJ) TDDB model using 40Mb 22FDX® STT-MRAM at sub-PPM failure rate.
Proceedings ArticleDOI
From Emergence to Prevalence: 22FDX® Embedded STT-MRAM
Johannes Müller,Aleksandra Titova,Hongsik Yoon,T. Merbeth,M. Weisheit,Georg Wolf,Sanjeeb Bharali,B. Pfefferling,Yuichi Otani,T. Shapoval,Alberto Cagliani,F. Vajda,Pedram Sadeghi,Christiana Villas-Boas Grimm,Frank Krause,Ines Altendorf,G. Congedo,Roberto Binder,Joachim Metzger,Alexander Lajn,Markus Langner,Y. S. You,O. Kallensee,Vinayak Bharat Naik,K. Yamane,Steven R. Soss +25 more
TL;DR: In this paper , the authors proposed a line of defense strategy for embedded STT-MRAM memory arrays by using magneto-electrical and magnetooptical techniques for drift partitioning as well as their correlation to the final wafer electrical test and reliability.
Proceedings ArticleDOI
STT-MRAM Product Reliability and Cross-Talk
Vinayak Bharat Naik,K. Yamane,J. Kwon,J. H. Lim,N. Balasankaran,N. L. Chung,L. Y. Hau,R. Chao,C. Chiang,Y. Huang,L. Pu,L. Ma,Chung-Ying Meng,Yoshiteru Otani,L. Y. Zhang,S. H. Jang,Tan Yun Ling,J. W. Ting,Hongsik Yoon,Jack H. Mueller,B. Pfefferling,O. Kallensee,T. Merbeth,Chim Seng Seet,J. Wong,Y. S. You,Steven R. Soss,T. H. Chan,Soh Yun Siah +28 more
TL;DR: The product reliability of industrial-grade (-40~125°C) 40Mb 22FDX® embedded-MRAM technology having 5x-solder reflows compatibility stack is presented and the stand-by magnetic immunity and cross-talk between MRAM and RF are also discussed.