S
S. Y. Siah
Researcher at GlobalFoundries
Publications - 6
Citations - 157
S. Y. Siah is an academic researcher from GlobalFoundries. The author has contributed to research in topics: Voltage. The author has an hindex of 4, co-authored 6 publications receiving 111 citations.
Papers
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Proceedings ArticleDOI
Manufacturable 22nm FD-SOI Embedded MRAM Technology for Industrial-grade MCU and IOT Applications
Vinayak Bharat Naik,J. H. Lim,Tae Young Lee,W. P. Neo,Hemant Dixit,L. C. Goh,T. Ling,J. Hwang,D. Zeng,J. W. Ting,Kangho Lee,Eng Huat Toh,L. Zhang,R. Low,N. Balasankaran,L. Y. Zhang,K. W. Gan,L. Y. Hau,Johannes Mueller,B. Pfefferling,O. Kallensee,K. Yamane,S. L Tan,Chim Seng Seet,Y. S. You,S. T. Woo,E. Quek,S. Y. Siah,John Pellerin,R. Chao,J. Kwon,Naganivetha Thiyagarajah,N. L. Chung,S. H. Jang,Behtash Behin-Aein +34 more
TL;DR: In this paper, a manufacturable 22nm FD-SOI 40Mb embedded MRAM (eMRAM) was demonstrated to achieve product functionality and reliability at package level across industrial-grade operating temperature range (−40 to 125 °C) with ECC-off mode.
Proceedings ArticleDOI
CMOS-embedded STT-MRAM arrays in 2x nm nodes for GP-MCU applications
Danny Pak-Chum Shum,Dimitri Houssameddine,S. T. Woo,Y. S. You,J. Wong,K. W. Wong,C. C. Wang,Kangho Lee,K. Yamane,Vinayak Bharat Naik,Chim Seng Seet,Taiebeh Tahmasebi,C. Hai,H. Yang,Naganivetha Thiyagarajah,R. Chao,J. W. Ting,N. L. Chung,T. Ling,T. H. Chan,S. Y. Siah,Rajesh R. Nair,Sarin A. Deshpande,Renu Whig,Kerry Joseph Nagel,Sanjeev Aggarwal,M. DeHerrera,J. Janesky,Ming-Wei Lin,H.-J. Chia,M. Hossain,H. Lu,Sumio Ikegawa,Frederick B. Mancoff,G. Shimon,Jon M. Slaughter,J. J. Sun,Michael Tran,Syed M. Alam,Thomas W. Andre +39 more
TL;DR: An unprecedented demonstration of a robust STT-MRAM technology designed in a 2x nm CMOS-embedded 40 Mb array with full array functionality, process uniformity and reliability, and 10 years data retention at 125C with extended endurance to ∼ 107 cycles is presented.
Proceedings ArticleDOI
22-nm FD-SOI Embedded MRAM Technology for Low-Power Automotive-Grade-l MCU Applications
Kangho Lee,R. Chao,K. Yamane,Vinayak Bharat Naik,H. Yang,J. Kwon,N. L. Chung,S. H. Jang,Behtash Behin-Aein,J. H. Lim,Bei Liu,Eng Huat Toh,K. W. Gan,D. Zeng,Naganivetha Thiyagarajah,L. C. Goh,T. Ling,J. W. Ting,J. Hwang,L. Zhang,R. Low,Rishikesh Krishnan,S. L Tan,Y. S. You,Chim Seng Seet,H. Cong,Jen Shuang Wong,S. T. Woo,E. Quek,S. Y. Siah +29 more
TL;DR: 22-nm FD-SOI 40Mb embedded MRAM (eMRAM) macros for automotive-grade-l (Auto-G1) MCU applications are demonstrated and the effects of magnetic tunnel junction (MTJ) size on reliability and scalability of eMRAM technology beyond 22 nm are examined.
Proceedings ArticleDOI
22-nm FD-SOI Embedded MRAM with Full Solder Reflow Compatibility and Enhanced Magnetic Immunity
Kangho Lee,K. Yamane,Seung-Mo Noh,Vinayak Bharat Naik,H. Yang,S. H. Jang,J. Kwon,Behtash Behin-Aein,R. Chao,J. H. Lim,K. W. Gan,D. Zeng,Naganivetha Thiyagarajah,L. C. Goh,B. Liu,Eng Huat Toh,B. Jung,T. L. Wee,T. Ling,T. H. Chan,N. L. Chung,J. W. Ting,S. Lakshmipathi,J. S. Son,J. Hwang,L. Zhang,R. Low,Rishikesh Krishnan,T. Kitamura,Y. S. You,Chim Seng Seet,H. Cong,Danny Pak-Chum Shum,Jen Shuang Wong,S. T. Woo,J. Lam,E. Quek,A. See,S. Y. Siah +38 more
TL;DR: A fully functional embedded MRAM macro integrated into a 22-nm FD-SOI CMOS platform and showing intrinsic stand-by magnetic immunity of 1.4 kOe reveals that eMRAM is capable of serving a broad spectrum of eFlash applications at 22 nm or beyond.
Proceedings ArticleDOI
Advanced MTJ Stack Engineering of STT-MRAM to Realize High Speed Applications
Tae Young Lee,K. Yamane,Y. Otani,D. Zeng,J. Kwon,J. H. Lim,Vinayak Bharat Naik,L. Y. Hau,R. Chao,N. L. Chung,T. Ling,S. H. Jang,L. C. Goh,J. Hwang,L. Zhang,R. Low,N. Balasankaran,F. Tan,J. W. Ting,J. Chang,Chim Seng Seet,S. Ong,Y. S. You,S. T. Woo,T. H. Chan,S. Y. Siah +25 more
TL;DR: In this paper, the authors demonstrate superior data retention of 1 month at 125°C with improved switching efficiency at 10 ns write time without back-hopping failure and showed an engineering pathway how advanced MTJ stack engineering can improve key device parameters.