R
R. J. Miller
Researcher at GlobalFoundries
Publications - 17
Citations - 569
R. J. Miller is an academic researcher from GlobalFoundries. The author has contributed to research in topics: Metal gate & Dielectric. The author has an hindex of 10, co-authored 17 publications receiving 556 citations.
Papers
More filters
Proceedings ArticleDOI
Extreme scaling with ultra-thin Si channel MOSFETs
Bruce B. Doris,Meikei Ieong,T. Kanarsky,Ying Zhang,Ronnen Andrew Roy,O. Dokumaci,Zhibin Ren,Fen-Fen Jamin,Leathen Shi,Wesley C. Natzle,Hsiang-Jen Huang,J. Mezzapelle,Anda Mocuta,S. Womack,Michael A. Gribelyuk,E.C. Jones,R. J. Miller,Hon-Sum P. Wong,Wilfried Haensch +18 more
TL;DR: In this paper, the scaling limits for planar single gate technology using the ultra-thin Si channel MOSFET have been examined and a ring oscillator with 26 nm gate lengths and ultra thin Si channels is presented.
Proceedings ArticleDOI
A 0.063 µm 2 FinFET SRAM cell demonstration with conventional lithography using a novel integration scheme with aggressively scaled fin and gate pitch
V. Basker,Theodorus E. Standaert,H. Kawasaki,C.-C. Yeh,Kingsuk Maitra,Tenko Yamashita,J. Faltermeier,H. Adhikari,Hemanth Jagannathan,Junli Wang,Hiroshi Sunamura,S. Kanakasabapathy,Stefan Schmitz,Jason E. Cummings,Atsuro Inada,Chung Hsun Lin,Pranita Kulkarni,Yu Zhu,J. Kuss,T. Yamamoto,Amit Kumar,Jeremy A. Wahl,Atsushi Yagishita,Lisa F. Edge,R. H. Kim,Erin Mclellan,S. Holmes,R. C. Johnson,T. Levin,James J. Demarest,Masami Hane,Mariko Takayanagi,Matthew E. Colburn,Vamsi Paruchuri,R. J. Miller,Huiming Bu,Bruce B. Doris,D. McHerron,Effendi Leobandung,James A. O’Neill +39 more
TL;DR: In this paper, the smallest FinFET SRAM cell size of 0.063 µm2 has been achieved using optical lithography using a double-expose, double-etch (DE2) sidewall image transfer (SIT) process.
Proceedings ArticleDOI
Channel doping impact on FinFETs for 22nm and beyond
Chung-Hsun Lin,R. Kambhampati,R. J. Miller,Terence B. Hook,A. Bryant,Wilfried Haensch,Philip J. Oldiges,Isaac Lauer,Tenko Yamashita,Veeraraghavan S. Basker,Theodorus E. Standaert,K. Rim,Effendi Leobandung,Huiming Bu,Mukesh Khare +14 more
TL;DR: In this article, the impact of channel doping on relevant device parameters such as T inv, mobility, electrostatic control and V th mismatch was investigated, and it was shown that V th extraction by the constant current method could mislead the DIBL analysis of devices with greatly different channel mobility.
Proceedings Article
Sub-25nm FinFET with advanced fin formation and short channel effect engineering
Tenko Yamashita,V. Basker,Theodorus E. Standaert,C.-C. Yeh,T. Yamamoto,Kingsuk Maitra,C.-H. Lin,J. Faltermeier,S. Kanakasabapathy,Miaomiao Wang,H. Sunamura,Hemanth Jagannathan,Alexander Reznicek,Stefan Schmitz,A. Inada,Junli Wang,H. Adhikari,N. Berliner,K-L. Lee,Pranita Kulkarni,Yu Zhu,Amit Kumar,A. Bryant,S. Wu,Thomas S. Kanarsky,Jin Cho,Erin Mclellan,S. Holmes,R. C. Johnson,T. Levin,James J. Demarest,James Chingwei Li,Philip J. Oldiges,John C. Arnold,Matt Colburn,Masami Hane,D. McHerron,Vamsi Paruchuri,Bruce B. Doris,R. J. Miller,Huiming Bu,Mukesh Khare,James A. O’Neill,Effendi Leobandung +43 more
TL;DR: In this paper, a dual-work function gate-first process flow at 100 nm gate pitch and 40 nm fin pitch is demonstrated, achieving N/P Ion values of 1250/950 uA/m at 100nA/um at 1V, 1300/1000 uA /m with self-heating correction.
Journal ArticleDOI
Aggressively Scaled Strained-Silicon-on-Insulator Undoped-Body High- $\kappa$ /Metal-Gate nFinFETs for High-Performance Logic Applications
Kingsuk Maitra,Ali Khakifirooz,Pranita Kulkarni,Veeraraghavan S. Basker,J. Faltermeier,Hemanth Jagannathan,H. Adhikari,Chun-Chen Yeh,N R Klymko,Katherine L. Saenger,Theodorus E. Standaert,R. J. Miller,Bruce B. Doris,Vamsi Paruchuri,D. McHerron,J. O'Neil,E Leobundung,Huiming Bu +17 more
TL;DR: In this paper, a gate-first flow was used to preserve uniaxial tensile strain in the transistors of strained-silicon-on-insulator (SSOI) undoped-body high-κ /metal-gate n-channel fin-shaped field effect transistors (nFinFETs).