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Yoshihito Amemiya

Researcher at Hokkaido University

Publications -  229
Citations -  3017

Yoshihito Amemiya is an academic researcher from Hokkaido University. The author has contributed to research in topics: Electronic circuit & CMOS. The author has an hindex of 26, co-authored 229 publications receiving 2921 citations. Previous affiliations of Yoshihito Amemiya include Nippon Telegraph and Telephone.

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Proceedings ArticleDOI

Frequency- and temporal-domain neural competition in analog integrate-and-fire neurochips

TL;DR: An inhibitory neural network implemented on analog CMOS chips, whose neurons compete with each other in the frequency and time domains provides a possible way to overcome the low-tolerance problems of analog devices in noisy environments.
Proceedings ArticleDOI

Current Reference Circuit for Subthreshold CMOS LSIs

TL;DR: In this paper, the authors proposed a reference current circuit that is insensitive to temperature and power supply voltage, which can be used for low power sub-threshold MOS LSIs.
Journal ArticleDOI

A New Planarization Technique for LSI Fabrication Utilizing Si-Ge Film Oxidation

TL;DR: In this paper, a planarization technique in the LSI process utilizing Si-Ge film oxidation is proposed, which is related to Ge evaporation, and it does not react with an underlying SiO2 or Si3N4 layer.
Journal ArticleDOI

Stochastic resonance among single-electron neurons on Schottky wrap-gate device

TL;DR: In this paper, the authors employed a single-electron transistor on a Schottky wrap-gate device as a neuron, and examined statistical results of the network by numerical simulation.
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Barrier Heights of Junctions between Amorphous Si-Ge-B and Crystalline GaAs

TL;DR: In this paper, the barrier height of the a-Si-Ge-B/GaAs junction is characterized through detailed investigation of the barrier heights, and the experimental results are interpreted in accordance with a generalized amorphous-crystalline junction model proposed in this paper.