1980 Preface * 1999 Preface * 1999 Acknowledgements * Introduction * 1 Circular Logic * 2 Phase Singularities (Screwy Results of Circular Logic) * 3 The Rules of the Ring * 4 Ring Populations * 5 Getting Off the Ring * 6 Attracting Cycles and Isochrons * 7 Measuring the Trajectories of a Circadian Clock * 8 Populations of Attractor Cycle Oscillators * 9 Excitable Kinetics and Excitable Media * 10 The Varieties of Phaseless Experience: In Which the Geometrical Orderliness of Rhythmic Organization Breaks Down in Diverse Ways * 11 The Firefly Machine 12 Energy Metabolism in Cells * 13 The Malonic Acid Reagent ('Sodium Geometrate') * 14 Electrical Rhythmicity and Excitability in Cell Membranes * 15 The Aggregation of Slime Mold Amoebae * 16 Numerical Organizing Centers * 17 Electrical Singular Filaments in the Heart Wall * 18 Pattern Formation in the Fungi * 19 Circadian Rhythms in General * 20 The Circadian Clocks of Insect Eclosion * 21 The Flower of Kalanchoe * 22 The Cell Mitotic Cycle * 23 The Female Cycle * References * Index of Names * Index of Subjects

https://www.cambridge.org/core/services/aop-cambridge-core/content/view/596B270197FE27DE5FABB598B6210622/S0025557200150892a.pdf/div-class-title-span-class-italic-the-geometry-of-biological-time-span-by-a-t-winfree-pp-544-dm68-corrected-second-printing-1990-isbn-3-540-52528-9-springer-div.pdf

The geometry of biological time , by A. T. Winfree. Pp 544. DM68. Corrected Second Printing 1990. ISBN 3-540-52528-9 (Springer)

https://users.dimi.uniud.it/~antonio.dangelo/Robotica/2012/helper/leggedRobot/Ijspeert08NN.pdf

2008 Special Issue: Central pattern generators for locomotion control in animals and robots: A review

The goal of this paper is to review in brief the basic physics of single-election devices, as well as their-current and prospective applications. These devices based on the controllable transfer of single electrons between small conducting "islands", have already enabled several important scientific experiments. Several other applications of analog single-election devices in unique scientific instrumentation and metrology seem quite feasible. On the other hand, the prospect of silicon transistors being replaced by single-electron devices in integrated digital circuits faces tough challenges and remains uncertain. Nevertheless, even if this replacement does not happen, single electronics will continue to play an important role by shedding light on the fundamental size limitations of new electronic devices. Moreover, recent research in this field has generated some by-product ideas which may revolutionize random-access-memory and digital-data-storage technologies.

Single-electron devices and their applications

The electronic properties of inorganic devices such as memristors can be used to simulate neurological behaviour. In particular, ionic and electronic effects in a silver sulphide device are now shown to mimic short- and long-term synaptic functions. Memory is believed to occur in the human brain as a result of two types of synaptic plasticity: short-term plasticity (STP) and long-term potentiation (LTP; refs 1, 2, 3, 4). In neuromorphic engineering5,6, emulation of known neural behaviour has proven to be difficult to implement in software because of the highly complex interconnected nature of thought processes. Here we report the discovery of a Ag2S inorganic synapse, which emulates the synaptic functions of both STP and LTP characteristics through the use of input pulse repetition time. The structure known as an atomic switch7,8, operating at critical voltages, stores information as STP with a spontaneous decay of conductance level in response to intermittent input stimuli, whereas frequent stimulation results in a transition to LTP. The Ag2S inorganic synapse has interesting characteristics with analogies to an individual biological synapse, and achieves dynamic memorization in a single device without the need of external preprogramming. A psychological model related to the process of memorizing and forgetting is also demonstrated using the inorganic synapses. Our Ag2S element indicates a breakthrough in mimicking synaptic behaviour essential for the further creation of artificial neural systems that emulate characteristics of human memory.

/pdf/short-term-plasticity-and-long-term-potentiation-mimicked-in-3c6onjbc0r.pdf

Short-term plasticity and long-term potentiation mimicked in single inorganic synapses

Computational geometry

We designed a special CMOS circuit for reaction-diffusion computers that accepts optical inputs in parallel and generates excitable spatial waves on a chip surface. We demonstrated the spatiotemporal properties of the proposed circuits by fabricated LSIs.

Reaction-diffusion chip implementing excitable lattices with multiple-valued cellular automata

This paper proposes a low-current reference circuit for power-aware LSI applications. The circuit consists of two current generation subcircuits which are based on β-multiplier circuit, one with a positive and the other with a negative temperature coefficient. The variation of the reference current in a sample circuit designed to produce a current of 230nA can be kept very small within ±1.3% in a wide temperature range of -20 to 100°C.

https://www.jstage.jst.go.jp/article/elex/5/6/5_6_204/_pdf

Temperature-compensated CMOS current reference circuit for ultralow-power subthreshold LSIs

Novel single electron binary-decision-diagram (BDD) node devices and circuits based on Schottky wrap-gate (WPG) control of AlGaAs/GaAs nanowires were designed, fabricated and characterized for the first time The WPG BDD node device showed clear path switching as well as conductance oscillation by WPG voltage control WPG-based BDD OR logic circuits were also successfully fabricated It is also shown that more complex-functional BDD circuits can be realized by suitable layouts of WPGs and nanowires

/pdf/gaas-schottky-wrap-gate-binary-decision-diagram-devices-for-3apsvypnks.pdf

GaAs Schottky wrap-gate binary-decision-diagram devices for realization of novel single electron logic architecture

SUMMARY A multiple-valued logic inverter is proposed that uses single-electron-tunneling (SET) circuits in which the discreteness of the electron charge is utilized.The inverter circuit, which is composed of only two SET transistors, has a memory function as well as an inverter function for multiple-valued logic.A quantizing circuit and a D flip-flop circuit for multiplevalued logic can be compactly constructed by combining two inverters.A threshold device can be compactly constructed by attaching more than one input capacitor to the inverter circuit. A quaternary full adder circuit can be constructed by using two threshold devices.Implementation issues are also discussed.

/pdf/multiple-valued-inverter-using-a-single-electron-tunneling-31rhp3eoe6.pdf

Multiple-Valued Inverter Using a Single-Electron-Tunneling Circuit

We present on-chip oscillator arrays synchronized by random noises, aiming at skew-free clock distribution on synchronous digital systems. Nakao et al. recently reported that independent neural oscillators can be synchronized by applying temporal random impulses to the oscillators [1],[2]. We regard neural oscillators as independent clock sources on LSIs; i.e., clock sources are distributed on LSIs, and they are forced to synchronize through the use of random noises. We designed neuron-based clock generators operating at sub-RF region (< 1 GHz) by modifying the original neuron model to a new model that is suitable for CMOS implementation with 0.25-μm CMOS parameters. Through circuit simulations, we demonstrate that i) the clock generators are certainly synchronized by pseudo-random noises and ii) clock generators exhibited phase-locked oscillations even if they had small device mismatches.

/pdf/noise-induced-synchronization-among-sub-rf-cmos-analog-3089y0qczu.pdf

Yoshihito Amemiya

Papers

Reaction-diffusion chip implementing excitable lattices with multiple-valued cellular automata

Temperature-compensated CMOS current reference circuit for ultralow-power subthreshold LSIs

GaAs Schottky wrap-gate binary-decision-diagram devices for realization of novel single electron logic architecture

Multiple-Valued Inverter Using a Single-Electron-Tunneling Circuit

Noise-Induced Synchronization among Sub-RF CMOS Analog Oscillators for Skew-Free Clock Distribution