Zoran Corporation

About: Zoran Corporation is a based out in . It is known for research contribution in the topics: Signal & Pixel. The organization has 241 authors who have published 205 publications receiving 4901 citations.

Electrically programmable read only memory

Abstract: A programmable read only memory (PROM) includes voltage programmable structures which are readily fabricated to provide predictable and selectable programming voltages. The resistor structure includes a body of semiconductor material having high electrical conductance and a surface contact region having a crystalline structure characterized by relatively high electrical resistance. The relatively high electrical resistance can be established by amorphotizing the surface region or by forming lattice defects in the crystalline structure such as by ion implantation. In programming the PROM, a sufficient voltage is applied across, or sufficient current is applied through, selected structures whereby the surface regions thereof are heated sufficiently to reduce the relatively high electrical resistance.

In-camera panorama image stitching assistance

Abstract: A camera that provides for a panorama mode of operation that stitches together two or more images to create a single image with a wide format. In panorama mode, a live view of a scene is transformed from rectangular coordinates to cylindrical coordinates and displayed by the camera. Also, an overlap portion between the previous image and the next image to be captured is characterized. In real time, after the previous image is captured, the overlap portion of the previous image is also transformed from rectangular coordinates into cylindrical coordinates. Next, the camera displays an overlay of at least a portion of the overlap portion onto the live view of the next image to be captured. And this overlay can assist the user in aligning the live view of the next image to be captured with the overlap portion of the previously captured image.

Method and apparatus for processing video and graphics data to create a composite output image having independent and separate layers of video and graphics display planes

Abstract: A method, apparatus, system and machine-readable medium for generating a composite output image based upon multiple input images. In certain embodiments, a plurality of input graphics images are iteratively blended in real time to provide a blended graphics image, which is then composited with other layers such as an input video image. The composite output image may then be provided to a display device. Iterative blending of the plurality of graphics images may include scaling, format conversion, and color space conversion, and may be performed based on priority information received for the graphics images from content sources. Compositing may include an alpha blending based on alpha values for pixels of the images.

Apparatus and method for improved PC audio quality

Abstract: A computer readable memory to direct a computer to improve the perceived audio quality of a speaker included in that computer. The computer readable memory stores a first, second and third set of instructions. The first set of instructions causes the computer to determine the speaker type. The second set of instructions causes the computer to select a set of default filter coefficients for a digital filter based upon the speaker type. Finally, the third set of instructions causes the computer to realize a digital parametric equalizer using a digital filter and the set of default filter coefficients. Thus, the digital filter alters the audio signal that is input to the speaker, thereby improving the perceived quality of the speaker.

Multiplier-accumulator circuit using latched sums and carries

Abstract: Vector dot multiplication is facilitated in a multiplier in which pipelining techniques are employed. Two vectors u(i), v(i), each having the same number of components (L), the components of the vector u(i) having m bits, and the components of the other vector v(i) having n bits per component. For example, a classical positive integer dot multiplier includes m-1 multiplier rows with each multiplier row having n+1 multiplying stages, each stage including an adder and latches. A latch interconnects the carry-out of each adder in a row to the carry-in of another adder in the same row, and a latch interconnects the sum output of each adder in a row to an input of another adder in another row. The result is accumulated in an adder according to the length of the vectors to be processed. 2's compliment number multiplication is accommodated by stretching each multiplier row by connecting two full adders serially therewith. Additionally, an inverter inverts the words u(i) and then applies the inverted words to the last multiplier row along with the sign bit for the other vector v(i). The same concept may be used to implement a variety of multipliers and floating point dot multipliers.