Journal ArticleDOI
A Cap-less Voltage Spike Detection and Correction Circuit for Low Dropout Regulator
P. Manikandan,B. Bindu +1 more
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TLDR
A cap-less voltage spike detection and correction circuit for flipped voltage follower (FVF)-based low dropout regulator (LDO) that consumes small additional bias current in the steady state and achieves less settling time and output spike voltage.Abstract:
A cap-less voltage spike detection and correction circuit for flipped voltage follower (FVF)-based low dropout regulator (LDO) is proposed in this paper The transients in the output voltage are coread more
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Journal ArticleDOI
A transient enhanced cap-less low-dropout regulator for wide range of load currents and capacitances
P. Manikandan,B. Bindu +1 more
TL;DR: In this article, a transient enhanced flipped voltage follower (FVF) based capless low-dropout (LDO) regulator for wide range of load currents and capacitances is presented.
Journal ArticleDOI
A Nested Miller Compensation with a large feed-forward transconductor for capacitor-less flipped voltage follower low dropout regulator
P. Manikandan,Bindu Boby +1 more
TL;DR: In this article , a capacitor-less flipped voltage follower (FVF) low dropout (LDO) regulator using nested miller compensation with a large feed-forward transconductor (NMCLFT) is presented.
References
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Journal ArticleDOI
An Output-Capacitorless Low-Dropout Regulator With Direct Voltage-Spike Detection
Pui Ying Or,Ka Nang Leung +1 more
TL;DR: An output-capacitorless low-dropout regulator (LDO) with a direct voltage-spike detection circuit is presented in this paper and the transient response of the LDO is significantly enhanced due to the improvement of the slew rate at the gate of the power transistor.
Journal ArticleDOI
A 6- $\mu$ W Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS Technology
Jianping Guo,Ka Nang Leung +1 more
TL;DR: Experimental result verifies that the proposed LDO is stable for a capacitive load from 0 to 50 pF and with load capability of 100 mA and the gain-enhanced structure provides sufficient loop gain to improve line regulation and load regulation.
Journal ArticleDOI
A High Slew-Rate Push–Pull Output Amplifier for Low-Quiescent Current Low-Dropout Regulators With Transient-Response Improvement
TL;DR: A high slew-rate amplifier with push-pull output driving capability is proposed to enable an ultra-low quiescent current (Iq ~ 1muA) low-dropout (LDO) regulator with improved transient responses to improve stability of LDO regulators without using any on-chip and off-chip compensation capacitors.
Journal ArticleDOI
A 200-mA Digital Low Drop-Out Regulator With Coarse-Fine Dual Loop in Mobile Application Processor
Yong-Jin Lee,Wanyuan Qu,Shashank Singh,Dae-Yong Kim,Kwang-Ho Kim,Sang-Ho Kim,Jae-Jin Park,Gyu-Hyeong Cho +7 more
TL;DR: This paper proposes a coarse-fine dual-loop architecture for the digital low drop-out (LDO) regulators with fast transient response and more than 200-mA load capacity and a digital controller is implemented to prevent contentions between the two loops.
Journal ArticleDOI
An Ultrafast Adaptively Biased Capacitorless LDO With Dynamic Charging Control
TL;DR: A common-gate error amplifier with high bandwidth and slew rate is proposed to reduce the output voltage spike and the response time of the LDO greatly and a faster and more accurate capacitorless LDO can be achieved.