# A comparison of lumped-based tunable matching networks for dynamically-load-modulated power amplifiers

TL;DR: A novel design method is presented in which the dynamic range of the tunable matching network is plotted on top of the required dynamic load, and the optimal network is chosen based on its dynamic range and the tunability of its capacitors.

Abstract: The power-added-efficiency of power amplifiers deteriorates rapidly as the input power drops. The efficiency at power back-off can be improved by modulating the load dynamically with a tunable matching network. In this work, a novel design method is presented in which the dynamic range of the tunable matching network is plotted on top of the required dynamic load. A comparison between conventional topologies has been performed, and the optimal network is chosen based on its dynamic range and the tunability of its capacitors. As proof of concept, an amplifier has been fabricated and tested achieving a maximum efficiency of 60% and an improvement of 9% with 6 dB of power back-off. The proposed method is useful in designing and optimizing tunable matching networks.

## Summary (2 min read)

### Introduction

- As mobile communications are evolving towards the fifth generation (5G), the required data rates are increasing considerably.
- This fact coupled with the high PAPR of the modern digital communications makes the design of efficient PAs very challenging.
- There have been many techniques to address this problem over the years.
- The Doherty technique [1] utilizes an auxiliary transistor, which modifies the load of the main transistor resulting in an optimal loading even at power back-off.
- Unlike static matching networks, the optimization of tunable matching networks is not simple.

### A. Source/Load Pull Simulations

- The first step in the design of DLM PAs is to determine the optimal input and output terminations for the transistor.
- Loadpull and source-pull simulations have been performed using the non-linear model of the GaN FET used in this work (CREE CGH40010).
- The design frequency has been chosen arbitrarily as 0.9 GHz, at which a source-pull has been performed first, while the transistor is biased in class-B conditions.
- Next, loadpull simulations for the fundamental as well as the second 1 and third harmonics have been iteratively performed at the maximum input power of 30 dBm.
- Next, the harmonics have been fixed and load-pull simulations have been carried out at the fundamental frequency for input power levels of (18 -30) dBm.

### B. Static Output Matching Network Design

- Since the harmonics are kept constant (with respect to the input power) during the load-pull simulation, a separate static network can be used to terminate them properly.
- This network consists of two transmission lines and two shunt stubs as shown in Fig.
- The shunt stubs are designed to provide short circuits at the second and third harmonics and open circuits at the fundamental frequency.
- The two transmission lines, on the other hand, are designed to provide the required phases for the second and third harmonics.
- After this network is optimized, the load-pull trajectory provided previously can be transformed beyond this network to the tunable network plane (Fig. 3), which is highlighted in red in Fig.

### C. Tunable Output Matching Network Design

- For the case of the tunable network, a lumped approach is adopted in this work.
- The boundaries at which the values of the tunable capacitors are at their minimum or maximum limits are also indicated in the figure.
- A typical varactor capacitance and quality factor as functions of the reversed bias are plotted in Fig.
- It can be seen that low capacitances correspond to high bias voltages while high capacitances correspond to low bias voltages.
- Taking this important fact into account, it becomes clear that even though all networks can provide the required coverage, the T-network requires much lower capacitance values and can provide a slightly wider coverage as shown in Fig.

### A. Tunable Capacitors Realization

- From the previous analysis, it has been concluded that the T-network provides the optimal solution in this case.
- The complete amplifier schematic is illustrated in Fig. 3, where the two parts of the OMN (the static and the tunable network) are highlighted.
- For the static network, a transmission line-based network has been optimized as illustrated previously.
- Since the amplifier used in this work is intended for highpower applications, varactors with as high breakdown voltages as possible should be selected.
- For C1, nine varactors have been used in a varactor stack configuration.

### B. Power Amplifier Simulation

- The complete power amplifier has been simulated in this part using realistic models for the transmission lines, lumped components, and the varactors.
- Two cases have been superimposed: the static matching case, where the amplifier is optimized for the maximum case, and the dynamic case, where the OMN dynamically adapts according to the input power.
- It can be observed that the amplifier provides almost the same performance for the two cases at the maximum input/output power.
- When the output power is reduced by 7 dBs from its maximum, the dynamic case offers 18% more efficiency as compared to the static case (Fig. 8).
- The maximum PAE achieved is about 72 % which drops to about %30 when the input power is reduced from the maximum by 7 dB.

### IV. MEASUREMENTS AND DISCUSSION

- Two digital power supplies (TTi MX100TP) have been used to provide the bias for the transistor and the varactors.
- The power supplies, signal generator, and power sensor have all been controlled by a common computer.
- The bias voltage of each varactor configuration has been swept from 10 Volts to 70 Volts, and the full combination has been measured for variable input power levels.
- The resultant measurements are plotted in Fig. 10.
- The difference in performance between the simulation and measurement indicates that the model used for the varactors is inadequate.

### V. CONCLUSION

- A dynamically load-modulated PA has been designed, built and tested.
- A novel design approach, in which multiple matching network topologies are compared, has been presented.
- Based on this design approach, the optimal network topology has been selected and implemented.
- The 1 design approach presented in this work may also be extended to other applications such as tunable antennas.

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##### Citations

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### Cites background from "A comparison of lumped-based tunabl..."

...Increasing the number of varactors in a TMN to two as in [19] gets closer to tracing the optimum impedance trajectory, but at increased complexity....

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...Varactor diodes also offer the f lexibil ity of both shunt [18] and series [21] configurations, with either single or multiple tuning elements [19], as shown below in Figure 7....

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##### References

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### "A comparison of lumped-based tunabl..." refers methods in this paper

...The Doherty technique [1] utilizes an auxiliary transistor, which modifies the load of the main transistor resulting in an optimal loading even at power back-off....

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### "A comparison of lumped-based tunabl..." refers background or methods in this paper

...The coverage of each network is plotted using the techniques developed in [3], [4] alongside the load-pull trajectory as shown in Fig....

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...All of these networks have two tunable capacitors because it is the smallest number that provides a two-dimensional coverage in the Smith chart [3]....

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...In this paper, the theoretical tools developed in our previous works are employed to analyze and compare various commonly used matching networks (MNs) [3], [4]....

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