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Analog Integrated Circuit Design

TLDR
In this paper, the authors present an overview of current mirror and Opamp design and compensation for single-stage Amplifiers and Current Mirrors, as well as a comparison of the two types of Opamps.
Abstract
Partial table of contents: Integrated--Circuit Devices and Modelling. Processing and Layout. Basic Current Mirrors and Single--Stage Amplifiers. Noise Analysis and Modelling. Basic Opamp Design and Compensation. Advanced Current Mirrors and Opamps. Comparators. Switched--Capacitor Circuits. Nyquist--Rate D/A Converters. Oversampling Converters. Phase--Locked Loops. Index.

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Journal ArticleDOI

A low-power low-noise CMOS amplifier for neural recording applications

TL;DR: In this article, a low-noise low-power biosignal amplifiers capable of amplifying signals in the millihertz-to-kilohertz range while rejecting large dc offsets generated at the electrode-tissue interface is presented.
Book

UWB theory and applications

TL;DR: This paper presents UWB Channel Models, a Hierarchical Model for Modulation Schemes of Receiver Structures, and Integrated Circuit Topologies, which describe the construction of receiver structures and the role of antennas in this system.
Journal ArticleDOI

The flipped voltage follower: a useful cell for low-voltage low-power circuit design

TL;DR: A design example showing the application of the FVF to build systems based on translinear loops is described which shows the potential of this cell for the design of high-performance low-power/low-voltage analog and mixed-signal circuits.
Book

ZigBee Wireless Networks and Transceivers

TL;DR: The ZigBee protocol is explained, how ZigBee can be used in location detection applications is described, and techniques for ZigBee co-existence with other wireless technologies such as 802.11 and Bluetooth are explored.
Journal ArticleDOI

Optimal design of a CMOS op-amp via geometric programming

TL;DR: A new method for determining component values and transistor dimensions for CMOS operational amplifiers (op-amps) is described, showing in detail how the method can be used to size robust designs, i.e., designs guaranteed to meet the specifications for a variety of process conditions and parameters.