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Journal ArticleDOI

Analytic modeling, optimization, and realization of cooling devices in silicon technology

C. Perret, +3 more
- 01 Dec 2000 - 
- Vol. 23, Iss: 4, pp 665-672
TLDR
In this paper, a cooling device based on micro-micromachining of the bottom side of the circuit wafer is presented, where microchannels and inlet-outlet nozzles are micromachined.
Abstract
A novel cooling device fully built in silicon technology is presented. The new concept developed in this work consists of micromachining the bottom side of the circuit wafer in order to embed heat sinking microchannels directly into the silicon material. These microchannels are then sealed, by a direct wafer bonding procedure, with another silicon wafer where microchannels and inlet-outlet nozzles are micromachined too. A cooling fluid (water) is then forced through the array of channel to convey heat outside the chip. Such a configuration presents advantages to provide a significant reduction of the cooler overall dimensions, to reduce the number of the involved materials and to be compatible with integrated circuit fabrication procedures, In this study analytical tools were used in order to get a global evaluation of all the thermal resistances characteristic of such devices. Using these adequate analytic models with appropriate approximations, a global optimization procedure was then applied and led to the definition of he optimum dimensions of the silicon micro heat sink. The realization procedure was then carried out in a clean room environment. First experimental characterization results obtained from the earlier prototypes demonstrated that the thermal properties of this silicon-based cooling device are satisfactory and can be reasonably compared to those of commercially available copper micro heat sinking components.

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Citations
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Journal ArticleDOI

Analysis of microchannel heat sink performance using nanofluids

TL;DR: In this article, the performance of silicon microchannel heat sink using nanofluids as coolants was analyzed based on theoretical models and experimental correlations, and it was found that the performances were greatly improved for these two specific geometries when nanoffluids were used as the coolants.
Journal ArticleDOI

Single-phase liquid cooled microchannel heat sink for electronic packages

TL;DR: In this article, a single-phase liquid-cooled microchannel heat sink for electronic packages is reported, and the measured junction to inlet fluid thermal resistances ranged from 0.44 to 0.32 °C/W for the 12 mm chip under the test flowrate range.
Journal ArticleDOI

Experimental Investigation of an Ultrathin Manifold Microchannel Heat Sink for Liquid-Cooled Chips

TL;DR: In this article, an experimental investigation of a novel, high performance ultrathin manifold microchannel heat sink is presented, which consists of impinging liquid slot-jets on a structured surface fed with liquid coolant by an overlying two-dimensional manifold.
Journal ArticleDOI

3-Dimensional numerical optimization of silicon-based high performance parallel microchannel heat sink with liquid flow

TL;DR: In this article, a semi-normalized 3D conjugate heat transfer model has been developed, validated and used to optimize the geometric structure of these types of microheat sinks.
Journal ArticleDOI

Microchannel heat sinks: an overview of the state-of-the-art

TL;DR: In this article, the authors present a state-of-the-art literature review of the progress of research in the field of microchannel heat sinks, focusing mainly on the most recent research, starting with the latter half of the 1990s.
References
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Journal ArticleDOI

High-performance heat sinking for VLSI

TL;DR: In this paper, a water-cooled integral heat sink for silicon integrated circuits has been designed and tested at a power density of 790 W/cm2, with a maximum substrate temperature rise of 71°C above the input water temperature.
Book

Convection Heat Transfer

Adrian Bejan
TL;DR: In this paper, the authors describe a transition from Laminar boundary layer flow to Turbulent Boundary Layer flow with change of phase Mass Transfer Convection in Porous Media.
Journal ArticleDOI

Bonding of silicon wafers for silicon‐on‐insulator

TL;DR: In this paper, the surface energy of a silicon-on-insulator was evaluated based on crack propagation theory, and it was found that the bond strength increased with the bonding temperature from about 60-85 erg/cm2 at room temperature to ≂2200 erg/ cm2 at 1400°C.
Journal ArticleDOI

Wafer bonding for silicon‐on‐insulator technologies

TL;DR: In this paper, a silicon wafer bonding process is described in which only thermally grown oxide is present between wafer pairs, and the wafers are drawn into intimate contact as a result of the gaseous oxygen between them being consumed by oxidation.
Journal ArticleDOI

A methodology and a tool for the computer aided design with constraints of electrical devices

TL;DR: A methodology for the computer aided constrained design of electrical devices is presented and validated through the design of a slotless permanent magnet structure based on the use of the analytical design equations of the device.
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