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Proceedings ArticleDOI

Generation and verification of tests for analogue circuits subject to process parameter deviations

TLDR
A new test effectiveness metric of probability of detection is defined and the application of the technique to an analog multiplier circuit is presented, which results in fault coverage figures more meaningful than those obtained with a fixed threshold.
Abstract
The paper presents a test pattern generation and fault simulation methodology for the detection of catastrophic faults in analogue circuits. The test methodology chosen for evaluation is RMS AC supply current monitoring. Tests are generated and evaluated taking account of the potential fault masking effects of process spread on the faulty circuit responses. A new test effectiveness metric of probability of detection is defined and the application of the technique to an analogue multiplier circuit is presented. The fault coverage figures are therefore more meaningful than those obtained with a fixed threshold, although they appear lower.

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Citations
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Proceedings Article

Extraction and Simulation of Realistic CMOS Faults using

TL;DR: FXT as mentioned in this paper is a software tool which implements inductive fault analysis for CMOS circuits and extracts a comprehensive list of circuit-level faults for any given CMOS circuit and ranks them according to their relative likelihood of occurrence.
Proceedings ArticleDOI

Combining Internal Probing with Artificial Neural Networks for Optimal RFIC Testing

TL;DR: A new test strategy based on DC or very low frequency (LF) measurements, which allows the elimination of expensive RF tests, is presented and proves to be a very interesting alternative to validate RF parameters with no need of expensiveRF equipments.
Journal ArticleDOI

Applying a robust heteroscedastic probabilistic neural network to analog fault detection and classification

TL;DR: This paper describes a new neural network structure that clusters responses assuming different means and variances, and shows that this technique is significantly more accurate than other classification methods.
Proceedings ArticleDOI

Dynamic supply current testing of analog circuits using wavelet transform

TL;DR: Simulation results on benchmark circuits show that wavelet based method is on average 25 times more sensitive than DFT (Discrete Fourier Transform) for parametric faults and can be considered as a promising alternative for analog fault detection amidst measurement hardware noise and process variation.
Proceedings ArticleDOI

CAT platform for analogue and mixed-signal test evaluation and optimization

TL;DR: The CAT platform as mentioned in this paper provides tools for fault simulation, test generation and test optimization for analogue and mixed-signal circuits, including tools for simulation independent fault modeling and injection, which makes this approach flexible with respect to past approaches.
References
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Book

Practical Nonparametric Statistics

W. J. Conover
TL;DR: Probability Theory. Statistical Inference. Contingency Tables. Appendix Tables. Answers to Odd-Numbered Exercises and Answers to Answers to Answer Questions as discussed by the authors.
Proceedings ArticleDOI

Extraction and simulation of realistic CMOS faults using inductive fault analysis

TL;DR: FXT is a software tool which implements inductive fault analysis for CMOS circuits and extracts a comprehensive list of circuit-level faults for any given CMOS circuit and ranks them according to their relative likelihood of occurrence.
Proceedings Article

Extraction and Simulation of Realistic CMOS Faults using

TL;DR: FXT as mentioned in this paper is a software tool which implements inductive fault analysis for CMOS circuits and extracts a comprehensive list of circuit-level faults for any given CMOS circuit and ranks them according to their relative likelihood of occurrence.
Journal ArticleDOI

Analog circuit fault diagnosis based on sensitivity computation and functional testing

TL;DR: An approach based on functional testing and on sensitivity calculation of many output parameters for diagnosis of defective elements in analog circuits is presented and Experimental results are presented to clarify the algorithm and prove its efficiency in a practical case.
Journal ArticleDOI

Optimization-Based Multifrequency Test Generation for Analog Circuits

TL;DR: This paper proposes an optimization based multifrequency test generation method for detecting parametric faults in linear analog circuits and selects the test frequencies that maximize the observability on a circuit performance of a parameter deviation under the worst masking effects of normal variations of the other parameters.
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