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Patent

InP-Based Transistor Fabrication

TLDR
In this paper, a dielectric layer may be deposited by ALD over a semiconductor layer including In and P. A channel layer is formed above a buffer layer having a lattice constant similar to a InP.
Abstract
Methods of forming structures that include InP-based materials, such as a transistor operating as an inversion-type, enhancement-mode device. A dielectric layer may be deposited by ALD over a semiconductor layer including In and P. A channel layer may be formed above a buffer layer having a lattice constant similar to a lattice constant of InP, the buffer layer being formed over a substrate having a lattice constant different from a lattice constant of InP.

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Citations
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Patent

Semiconductor device, and manufacturing method thereof

TL;DR: In this article, the oxide semiconductor film has at least a crystallized region in a channel region, which is defined as a region of interest (ROI) for a semiconductor device.
Patent

Process feed management for semiconductor substrate processing

TL;DR: In this paper, a gas channel plate for a semiconductor process module is described, which includes a heat exchange surface including a plurality of heat exchange structures separated from one another by intervening gaps.
Patent

Method of forming insulation film by modified PEALD

TL;DR: In this paper, a method of forming an insulation film by alternating multiple times, respectively, a process of adsorbing a precursor onto a substrate and treating the adsorbed surface using reactant gas and a plasma, wherein a plasma is applied in the process of supplying the precursor.
Patent

Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species

TL;DR: In this paper, a process and system for depositing a thin film onto a substrate using atomic layer deposition (ALD) is described. But it is not shown how to apply ALD to a metal oxide layer.
References
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Journal ArticleDOI

Defects in epitaxial multilayers: I. Misfit dislocations*

TL;DR: In this paper, it was shown that the interfaces between layers were made up of large coherent areas separated by long straight misfit dislocations and the Burgers vectors were inclined at 45° to (001) and were of type 1/2a.
Journal ArticleDOI

Electrically pumped hybrid AlGaInAs-silicon evanescent laser

TL;DR: An electrically pumped AlGaInAs-silicon evanescent laser architecture where the laser cavity is defined solely by the silicon waveguide and needs no critical alignment to the III-V active material during fabrication via wafer bonding is reported.
Journal ArticleDOI

Etch rates for micromachining processing-Part II

TL;DR: In this paper, the etch rates of 53 materials that are used or potentially can be used or in the fabrication of microelectromechanical systems and integrated circuits were prepared.
Journal ArticleDOI

Etch rates for micromachining processing

TL;DR: The etch rates for 317 combinations of 16 materials (single-crystal silicon, doped, and undoped polysilicon, several types of silicon dioxide, stoichiometric and silicon-rich silicon nitride, aluminum, tungsten, titanium, Ti/W alloy, and two brands of positive photoresist) used in the fabrication of microelectromechanical systems and integrated circuits in 28 wet, plasma, and plasmaless-gas-phase etches (several HF solutions, H/sub 3/PO/sub 4), HNO/sub
Journal ArticleDOI

Thick GaN Epitaxial Growth with Low Dislocation Density by Hydride Vapor Phase Epitaxy

TL;DR: In this article, GaN layers with a dislocation density as low as 6×107 cm-2 were grown on 2-inch-diameter sapphire wafers.