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Proceedings ArticleDOI

Language and Compilation of Parallel Programs for *-Predictable MPSoC Execution Using Invasive Computing

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TLDR
It is shown that statically proven quality guarantees may be enforced on many multi-core architectures by a presented hybrid mapping approach and a real-world case study from the domain of heterogeneous robot vision is given to demonstrate the capabilities of this approach to guarantee statically analyzed best and worst-case timing requirements on latency and throughput.
Abstract
The predictability of execution qualities including timeliness, power consumption, and fault-tolerability is of utmost importance for the successful introduction of multi-core architectures in embedded systems requiring guarantees rather than best effort behavior. Examples are real-time and/or safety-critical parallel applications. In particular for future many-core architectures, analysis tools for proving such properties to hold for a given application irrespective of other workload either suffer from computational complexity. Or, sound bounds are of no practical interest due to severe interferences of resources and software at multiple levels. In view of abundant computational and memory resources becoming available, we propose to apply the principles of invasive computing to avoid sharing of resources at run time as much as possible. We subsequently show that statically proven quality guarantees may be enforced on many multi-core architectures by a presented hybrid mapping approach. Rather than fixed resource mappings, this approach provides only constellations of resource allocations to the run-time system that searches for such constellations and assigns the invader a suitable claim of resources, if possible. We have implemented this hybrid approach and the interface to the language InvadeX10, a library-based extension of the X10 programming language. In this extension, so-called requirements on execution qualities such as deadlines (e.g., in the form of latency constraints) may be annotated to individual programs or even program segments. These are then translated into satisfying resource constellations that need to be found at run time prior to admitting a parallel application to start, respectively continue in view of required execution quality requirements. We give a real-world case study from the domain of heterogeneous robot vision to demonstrate the capabilities of this approach to guarantee statically analyzed best and worst-case timing requirements on latency and throughput.

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Citations
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Journal ArticleDOI

Time-Critical Systems Design: A Survey

TL;DR: This paper presents a survey regarding various aspects of designing time-critical computing systems.
Journal ArticleDOI

Hybrid Application Mapping for Composable Many-Core Systems: Overview and Future Perspective

TL;DR: An overview of the main challenges encountered when employing HAM is provided, a collection of state-of-the-art techniques and methodologies proposed to address these challenges are surveyed, and possible future directions are outlined.
Book ChapterDOI

Run-Time Enforcement of Non-functional Program Properties on MPSoCs

TL;DR: This paper classifies and presents techniques for enforcement of non-functional properties, and presents centralized and distributed enforcement techniques in which preferential threads called e-lets are generated to control system resources in view of application/task workload variation.
Proceedings ArticleDOI

Run-Time Enforcement of Non-Functional Application Requirements in Heterogeneous Many-Core Systems

TL;DR: This paper classify and present techniques to enforce nonfunctional execution properties on multi-core platforms based on a static design space exploration and analysis of influences of variability of non-functional properties, and shows that by controlling DVFS settings of cores proactively, not only tight execution times, but also reliability requirements may be enforced dynamically.

Resource-aware Programming in a High-level Language - Improved performance with manageable effort on clustered MPSoCs

TL;DR: Bis 2001 bedeutete Moores and Dennards Gesetz eine Verdoppelung der Ausfuhrungszeit alle 18 Monate durch verbesserte CPUs, which ist Nebenlaufigkeit das dominante Mittel zur Beschleunigung of Supercomputern bis zu mobilen Geraten.
References
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Book ChapterDOI

Pareto-Front Exploration with Uncertain Objectives

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Journal ArticleDOI

Timing predictability of cache replacement policies

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