Journal ArticleDOI
Sampling clock jitter effects in digital-to-analog converters
TLDR
A formula for the output error power due to sampling clock jitter for a sinusoidal input is derived and verified by numerical simulations, and its spectrum characteristics is shown.About:
This article is published in Measurement.The article was published on 2002-04-01. It has received 38 citations till now. The article focuses on the topics: Jitter & Integral nonlinearity.read more
Citations
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Journal ArticleDOI
Modeling Timing Jitter Effects in Digital-to-Analog Converters
Leopoldo Angrisani,Mauro D'Arco +1 more
TL;DR: A new analytical model capable of describing the effects on DAC output due to deterministic jitter is proposed and very practical and usable relations are given in order to make its use very straightforward in most applications.
Journal ArticleDOI
Modeling DAC Output Waveforms
TL;DR: This paper presents a new model capable of describing the functioning of a real DAC affected by horizontal quantization, clock modulation, vertical quantization and integral nonlinearity, characterized by a low computational burden.
Proceedings ArticleDOI
Modeling timing jitter effects in digital-to-analog converters
TL;DR: A new analytical model capable of describing the effects on DAC output due to deterministic jitter is proposed and very practical and usable relations are given in order to make its use very straightforward in most applications.
Proceedings ArticleDOI
Spread-spectrum clocking in switching regulators to reduce EMI
TL;DR: In this paper, the authors describe a simple, inexpensive technique for intentionally broadening and flattening the spectrum of a DC-DC converter (switching regulator) to reduce electromagnetic interference (EMI).
Journal ArticleDOI
Defining DAC performance in the frequency domain
TL;DR: New definitions for THD, SFDR, SNR, SINAD, ENOB and IMD are proposed taking into account the most used definitions, their measurability and the need of avoiding any ambiguities.
References
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Journal ArticleDOI
A general theory of phase noise in electrical oscillators
Ali Hajimiri,Thomas H. Lee +1 more
TL;DR: In this paper, a general model is introduced which is capable of making accurate, quantitative predictions about the phase noise of different types of electrical oscillators by acknowledging the true periodically time-varying nature of all oscillators.
Journal ArticleDOI
A study of phase noise in CMOS oscillators
TL;DR: In this paper, the phase noise in two inductorless CMOS oscillators is analyzed and a new definition of phase noise is defined, and two prototypes fabricated in a 0.5/spl mu/m CMOS technology are used to investigate the accuracy of the theoretical predictions.
Book
Principles of Data Conversion System Design
TL;DR: This advanced text and reference covers the design and implementation of integrated circuits for analog-to-digital and digital-toanalog conversion and systematically leads the reader to advanced topics, describing design issues and techniques at both circuit and system level.
Journal ArticleDOI
Explicit analysis of channel mismatch effects in time-interleaved ADC systems
TL;DR: This paper derives explicit formulas for the mismatch effects when all of offset, gain and timing mismatches exist together in the time-interleaved ADC system and discusses the bandwidth mismatch effect.
Journal ArticleDOI
Jitter analysis of high-speed sampling systems
TL;DR: The jitter of such practical sampling systems as analog-to-digital converters, sample-and-hold circuits, and samplers is discussed and a model for estimating jitter is proposed, based on sampling sine-wave signal- to-noise ratio calculations.