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Patent

Short channel CMOS on 110 crystal plane

TLDR
In this article, a monocrystalline silicon substrate having a (110) crystal plane is prepared and a CMOS transistor is formed on this substrate, where the channel length is 1.5 μm or less and the velocity saturation phenomenon of electrons is outstanding.
Abstract
A monocrystalline silicon substrate having a (110) crystal plane is prepared. A CMOS transistor is formed on this substrate. An N channel MOS transistor and a P channel MOS transistor are formed in the surface of the semiconductor substrate. In each of these transistors the channel length is 1.5 μm or less and the velocity saturation phenomenon of electrons is outstanding.

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Citations
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References
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Journal ArticleDOI

Mobility Anisotropy of Electrons in Inversion Layers on Oxidized Silicon Surfaces

TL;DR: In this paper, the field-effect mobility of electrons in inversion layers of Si as functions of the crystalline orientation of the surface and of the azimuthal direction of the current path within the layers is reported.
Patent

Recrystallized CMOS with different crystal planes

TL;DR: In this paper, a CMOS IC is formed on a semiconductor crystalline surface having a plane azimuth (110) or (023) or of a plane angle close to or in parallel with the above planes, in order to increase the speed of operation.
Patent

Complementary field-effect-type semiconductor device

TL;DR: In this paper, a complementary field effect transistor with N and P channels lying along the main surface of the substrate and oriented in such a way that the direction of current through one conductivity-type channel or channels is at right angles to the direction through the opposite conductivity -type channels or channels.
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Preferred device orientation on integrated circuits for better matching under mechanical stress

TL;DR: In this paper, a system including matched semiconductor elements in a monolithic integrated circuit together with an inexpensive encapsulation is described, which is achieved by predetermined placement and orientation of the matched components on the semiconductor element.
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