Showing papers on "Dynamic demand published in 2000"

Power transfer allocation for open access using graph theory-fundamentals and applications in systems without loopflow

Abstract: In this paper, graph theory is used to calculate the contributions of individual generators and loads to line flows and the real power transfer between individual generators and loads that are significant to transmission open access. Related lemmas are proved which present necessary conditions required by the method. Based on AC load flow solution a novel method is suggested which can decide downstream and upstream power flow tracing paths very fast and can calculate the contribution factors of generations and loads to the line flows efficiently. The power transfer between generators and loads can also be determined. The suggested method is suitable for both active and reactive power tracings of real power systems.

Power/energy management control system

Abstract: A power management system controls power and energy drawn by a load monitoring total drawn power and energy and modifying load usage. A power meter monitors power drawn by a load and provides a control circuit with an indication of power draw. The control circuit controls the power delivered to the load based on predetermined criteria, such a power threshold. Other sensors and controls such as environment status detectors or emergency commands are used by the control circuit to adjust the power provided to the load, or even to shut off power to the load. The control circuit can be a microprocessor based controller, or can be a remotely located personal computer which interacts with load drivers through a communication link. The control circuit can also have a profile for operation under various criteria, with profile parameters adjustable depending upon conditions. The profile parameters can be adjusted automatically by a control program, or by a user remotely. The control circuit can also drive the load at a known value and compare the power drawn with a stored reference value for the load. The system can thus be evaluated for failed or degraded components based on changes in the expected power draw.

High-speed dynamic logic styles for scaled-down CMOS and MTCMOS technologies

Abstract: A new high-speed domino circuit, called HS-Domino is developed. HS-Domino resolves the trade-off between performance and noise margins in conventional CD-Domino logic while dissipating low dynamic power with minimal area overhead. A dual-threshold (MTCMOS) implementation of HS-Domino and DDCVS logic is also devised. This implementation achieves low leakage values during standby, while maintaining high performance and low dynamic power during the active mode.

Load management techniques

Abstract: Electric power has shaped and contributed to the progress and advances of humankind over the past century. Power should be available to the customer upon demand. The power companies strive to keep the reserve capacity to meet the sudden demand to a minimum. Load management techniques help the power company to reshape the electric utility load curve and to reduce the peak demand. The United States Government has filed lawsuits against 32 electrical utility plants charging the release of massive amounts of air pollutants throughout the Midwest and East coast. Electrical utilities are responsible for 65% of sulphuric dioxide emissions in the United States. If the customers demand more power, the power companies would supply power by building more generation facilities. This concept of supply-side management has been very popular in the seventies of the twentieth century. The demand-side management techniques influence the customers to help to reshape the load demand curves. This article analyzes the load management techniques in great detail. The power company must devise incentives to help customers to modify the load-curves. The customers must change their lifestyles to help to implement the load management techniques. Load management techniques make electricity do more by using it better. The important point is that less energy is wasted. Load management techniques could force the utilities to become globally competitive and control the demand and energy consumption.

A multi-level multi-phase charge-recycling method for low-power AMLCD column drivers

Abstract: This paper describes a new low-power design concept appropriate for column drivers of high-resolution active matrix liquid crystal displays with a dot inversion method. The proposed multi-level multiphase charge-recycling method reduces power consumption incurred in driving highly capacitive column lines by storing the charge into the external capacitors and reusing it in the next cycle. With the proposed method, power consumption can be reduced asymptotically to zero with the infinite number of storage capacitors. However it is also shown that total power reduction can be counterbalanced by the power consumption in driving switches used in the recycling process. Analytical equations, simulation results, and measurement results from an experimental chip are shown to validate the proposed method. Dynamic power reduction of 55%-70% is measured with a three-level five-phase charge-recycling method compared with a conventional column driver.

Simultaneous optimisation of dynamic power, area and delay in behavioural synthesis

Abstract: Concern over power dissipation, coupled with the continuing rise in system size and complexity, means that there is a growing need for high-level design tools capable of doubt automatically optimising systems to take into account power dissipation, in addition to the more conventional metrics of area, delay and testability. Current methods for reducing power consumption tend to be ad-hoc: for example, slowing down, or turning off idle parts of the system, or a controlled reduction in power supply. The behavioural synthesis system described here features an integrated incremental power estimation capability, which makes use of activity profiles, generated automatically through simulation of a design on any standard VHDL simulator; accurate circuit-level cell models (generated, again automatically, via SPICE simulation); and a comprehensive system power model. This data, along with similar estimators for area and delay, guides the optimisation of a design towards independent user-specified objectives for final area, delay, clock speed, and energy consumption. In addition, a range of power reducing features are included, encompassing: supply voltage scaling, clock gating, input latching, input gating, low-power cells, and pipelined and multicycle units. These are automatically exploited during optimisation as part of the area/delay/power dissipation trade-off process. The resulting system is capable of reducing the estimated energy consumption of several benchmark designs by factors of between 3.5 and 7.0 times. Furthermore, the design exploration capability enables a range of alternative structural implementations to be generated from a single behavioural description, with differing area/delay/power trade-offs.

System-level power consumption modeling and tradeoff analysis techniques for superscalar processor design

Abstract: This paper presents systematic techniques to find low-power high-performance superscalar processors tailored to specific user applications. The model of power is novel because it separates power into architectural and technology components. The architectural component is found via trace-driven simulation, which also produces performance estimates. An example technology model is presented that estimates the technology component, along with critical delay time and real estate usage. This model is based on case studies of actual designs. It is used to solve an important problem: decreasing power consumption in a superscalar processor without greatly impacting performance. Results are presented from runs using simulated annealing to reduce power consumption subject to performance reduction bounds. The major contributions of this paper are the separation of architectural and technology components of dynamic power the use of trace-driven simulation for architectural power measurement, and the use of a near-optimal search to tailor a processor design to a benchmark.

Bus encoding for low-power high-performance memory systems

Abstract: High-performance memory buses consume large energy as they include termination networks, BiCMOS and/or open-drain output. This paper introduces power reduction techniques for memory systems deliberating on burst-mode transfers over the high-speed bus specifications such as Low Voltage BiCMOS (LVT), Gunning Transfer Logic (GTL+) and Stub Series Termination Logic (SSTL_2) which are widely used. The reduction techniques take both the static and the dynamic power consumption into account because most high-performance bus drivers and end-termination networks dissipate significant static power as well. Extensive performance analysis is conducted through mathematical analysis and trace data-driven simulations. We had reduction of 14% with random data and up to 67.5% with trace data.

Development of an interactive rule-based system for bulk power system restoration

Abstract: This paper presents a rule-based system to generate and implement a dynamic restoration plan for a partial or total blackout in a bulk power system. The governor response and ramp rate of each generator, system load regulation, pick-up characteristic of individual load and the transmission network are modeled. If the differences between the telemetry data and the calculated system frequency or the calculated total generation at each power station exceed the specified tolerance, the restoration plan will be updated and adjusted accordingly. The complete load flow calculation is conducted at every minute and the voltage and reactive power flow is controlled. Various cases in a prototype system are tested and encouraging results are obtained. The developed restoration system can provide a complete restoration plan within a very short time and it can also dynamically generate a new restoration plan as and when required.

Towards dynamic security-constrained congestion management in open power market

Abstract: Security and reliability are major concerns in the deregulated and unbundled electricity supply industry due to the increased number of market participants and the changing demand patterns. This letter presents an approach and investigates the impact of incorporating dynamic security considerations in an open market environment. It is possible to reschedule the real power generation along with curtailment of real power loads/transactions to make the system dynamically secure after a fault. A conceptually plausible and computationally feasible approach for the solution of this problem has been developed for a system with a mix of pool and contract dispatches.

Load leveling system and method

Abstract: PROBLEM TO BE SOLVED: To level the consumed load currents to optimize the power consumption of the user, and reduce the cost for both the utility company and the user by supplying information to each user about the loaded situation and explaining it. SOLUTION: This is a load leveling system for the power generator/ distributor center and the power generator connected to plural users 1-N. It consists of a demand forecast function 102, a negotiation function 107 to negotiate with the user on the load power consumed by the user showing the power to be conserved against the demand power and incentives to the users 1-N, and an input/output control 109 to receive the user's answers after negotiations. Through such negotiations, control is promoted on the load power used by the user to level the load on the central equipment.

An economic analysis of the self commitment of thermal units

Abstract: Given the load profile of an electricity market and the capabilities of the set of generators supplying power to that market, it is likely that at any given point in time, available supply will exceed demand. If only a subset of generators is required, some method is required to commit and de-commit generators. In the past, system operators have employed a centralized method of unit commitment. Deregulation of the electricity industry throws doubt on the continued suitability of this method due to fairness issues and availability of accurate cost data. This paper examines the performance of decentralized unit commitment, where dispatch of generators is determined by offer curves submitted into a spot market by power producers.

General framework for Dynamic Demand Simulation

Abstract: The development and evaluation of Dynamic Traffic Management Systems (DTMS) for Intelligent Transportation Systems (ITS) applications require sophisticated simulation tools. Many traffic simulators representing traffic at various levels of aggregation have been developed and used. Despite the importance of demand in this context, these tools focus mainly on the supply aspects of the transportation systems. Demand is usually just an input to the simulator. The lack of dynamic demand simulators seems to be due to the difficulty of combining different models (like discrete choice models and OD matrix estimation) within a common environment. Therefore, a unifying framework, where different models can cooperate, will provide the necessary incentives for the development and implementation of a new class of dynamic demand simulators. In this paper, we propose a general framework for the design and development of dynamic demand simulators. It is sufficiently general to encapsulate a wide variety of applications, models, data and algorithms. The paper not only describes the conceptual framework, Ecole Polytechnique Federale de Lausanne, Dpt. of Mathematics, CH-1015 Lausanne, Switzerland. Email: michel.bierlaire@epfl.ch The Ohio State University, Columbus, Oh. Email: mishalani.1@osu.edu Massachusetts Institute of Technology, Dpt of Civil and Environmental Engineering, Cambridge, Ma. Email: mba@mit.edu

A Parallel Computing Framework for Dynamic Power Balancing in Adaptive Mesh Refinement Applications

Abstract: This chapter describes a new computing paradigm for irregular applications, in which the computational load varies dynamically and neither the nature nor location of this variation is known a priori. In such instances, load imbalances between distributed processes become a serious impediment to parallel performance, and different schemes have to be devised to balance the load. This chapter describes preliminary work, which uses “computational power balancing”. In this model, instead of balancing the load on distributed processes, the processes ask for help by recruiting other processors. This chapter illustrates the feasibility and practicality of this paradigm in an adaptive mesh application for solving non-linear dynamical systems and in the solution of large linear systems using an Additive Schwarz Preconditioned Conjugate Gradient method. The paradigm is illustrated on a SGI-Cray Origin 2000 system using MPI for distributed programming and OpenMP for shared memory programming.

Competitive procurement of dynamic reactive power support service for transmission access

Abstract: Competitive procurement of reactive power support services is rapidly becoming a reality for deregulated electricity markets. This has resulted in a great need to quantify the value and to compensate the service of reactive power support. This paper presents preliminary research results on the development of concepts and schemes for equitable reactive power support valuation. The work emphasizes that the valuation of reactive power support services must be based on their contributions to system security and stability. The dynamic VAr support is of much greater importance in the value assessment. The paper uses a simple system to demonstrate and define the problem, and introduces the concept of value curves. A solution method is proposed along with preliminary case study results.

Cache-Line Decay: A Mechanism to Reduce Cache Leakage Power

Abstract: Reducing the supply voltage to reduce dynamic power consumption in CMOS devices, inadvertently will lead to an exponential increase in leakage power dissipation. In this work we explore an architectural idea to reduce leakage power in data caches. Previous work has shown that cache frames are "dead" for a significant fraction of time [14]. We are exploiting this observation to turn off cache lines that are not likely to be accessed any more. Our method is simple: if a cache-line is not accessed within a fixed interval (called decay interval) we turn off its supply voltage using a gated Vdd technique introduced previously [12]. We study the effect of cache-line decay on both power consumption and performance. We find that it is possible with cache-line decay to build larger caches that dissipate less leakage power than smaller caches while yielding equal or better performance (fewer misses). In addition, because our method can dynamically trade performance for leakage power it can be adjusted according to the requirements of the application and/or the environment.

An integrated tool for analysis of power system constraints in the Spanish electricity market

Abstract: The role of the system operator in the Spanish electricity market, as it started on January 1/sup st/ 1998, is to determine the technical feasibility of the generation dispatch provided by the market operator. The security criteria of the Spanish power system require that branch power flows and bus voltages are within their limits, not only in normal operating conditions but also when any credible contingency occurs. This paper presents an integrated tool for analysis of power system constraints in the Spanish electricity market. The components of this tool are: a power system scenarios builder; contingency analysis routines; and preventive dispatch algorithms (active and reactive power). The tool addresses separately the overloaded branches and the bus voltage violations. The performance of the tool is illustrated using an actual scenario of the Spanish power system.

Application of unified power flow controller for power quality control at demand side

Abstract: This paper describes the control scheme and characteristics of the UPFC (unified power flow controller) installed at a substation near the end of the customer side, which works to improve the power quality at demand side by power conditioning. In this study, the simulation is based on the function of the instantaneous power and reactive power under the condition that UPFC has been installed near the demand side. The effectiveness of it is concluded as a result of voltage suppression and removal of harmonics distortion. UPFC, is also able to suppress the interaction between the high power supply from power plants and power generation on a small scale by consumers, and remove any harmonics distortions injected from other loads or power system networks.

Demand side provision of peaking capacity and reserves in deregulated power systems

Abstract: An unsolved problem in deregulated power systems is the long-term availability of peaking capacity. This paper proposes to utilize demand flexibility to solve the problem. It shows how various assumptions on demand elasticity affect the social welfare of load shedding. The key point is that the social cost of well prepared load shedding, based on end users' willingness to pay can be much lower than the conventional value of lost load. The results are illustrated with an example of the Norwegian case. Finally, the paper argues that the implementation costs of using demand elasticity should be shared among all benefiting parties.

An assertion based technique for transistor level dynamic power estimation

Abstract: With increasing complexity of submicron designs, transistor level power estimations and analyses have become a necessity. Power conscious synthesis and optimizations are critical aspect of design flow These require a fast approach to estimate average power and predict the upper bound. A novel assertion based approach for predicting worst dynamic power dissipation is presented here. This technique models all signal correlations within the design. It maximizes loading conditions using assertions to predict maximum power. An Elmore model is used for calculating delay-based power estimates. The technique allows for quick prediction of the power dissipated in the design without loss of much accuracy. It does not need any elaborate circuit simulation iterations. The input pattern dependence is eliminated using the Monte-Carlo approach.

True average wide dynamic range power sensor

Abstract: The present invention provides a true average wide dynamic range (TA-WDR) power sensor that can be used to make accurate power measurements from −70 dBm to +20 dBm or more (wide dynamic range), regardless of the format of the signal (true average). In one preferred embodiment, the present invention provides a true average wide dynamic range power sensor comprising an input for receiving RF signals having wide dynamic power ranges, a first RF path including a low power diode sensor for measuring RF signals having low power ranges, a second RF path including an attenuator high power sensor for measuring RF signals having high power ranges, and a switch for isolating the first RF path when the high power RF signals exceeds the square law region of the diode sensor.

Space Solar Power Satellite Technology Development at the Glenn Research Center: An Overview

Abstract: NASA Glenn Research Center (GRC). is participating in the Space Solar Power Exploratory Research and Technology program (SERT) for the development of a solar power satellite concept. The aim of the program is to provide electrical power to Earth by converting the Sun's energy and beaming it to the surface. This paper will give an overall view of the technologies being pursued at GRC including thin film photovoltaics, solar dynamic power systems, space environmental effects, power management and distribution, and electric propulsion. The developmental path not only provides solutions to gigawatt sized space power systems for the future, but provides synergistic opportunities for contemporary space power architectures. More details of Space Solar Power can be found by reading the references sited in this paper and by connecting to the web site http://moonbase.msfc.nasa.gov/ and accessing the "Space Solar Power" section "Public Access" area.

Power market dynamic analysis

Abstract: This paper concentrates on analyzing the dynamic performances of the power market. Firstly this paper proposes a dynamic mathematical model of the power market based on some assumptions and concepts. Then some aspects, such as the power flow computing, the stability, the fault analysis, and the frequency stability, etc. are analyzed using this model. The dynamic model and the conclusions in this paper may be valuable in the further power market studies.

Power optimization of delay constrained circuits

Abstract: We present a framework for combining Voltage Scaling (VS) and Gate Sizing (GS) techniques for power optimizations. We introduce a fast algorithm for choosing gates for sizing and voltage scaling such that the total power is minimized under delay constraints. We also use a more accurate estimate for determining the power dissipation of the circuit by taking into account the short circuit power along with the dynamic power. A better model of the short circuit power is used which takes into account the loading capacitance of the gates. Our results show that the combination of VS and GS perform better than the techniques applied in isolation. An average power reduction of 73% is obtained when decisions are taken assuming dynamic power only. In contrast, average power reduction is 77% when decisions include the short circuit power dissipation.

Impact of Voltage Scaling on Glitch Power Consumption

Abstract: To be able to predict the importance of glitches in future deep-submicron processes with lowered supply and threshold voltages, a study has been conducted on designs, which experience glitching, at supply voltages in the range from 3.5 V to 1.0 V. The results show that the dynamic power consumption caused by glitches will, in comparison to the dynamic power consumption of transitions, be at least as important in the future as it is today.

Reactive power planning and operating in the deregulated power utilities

Abstract: In the deregulated power industry, questions such as: Who is responsible for the reactive power compensation?; Are the reactive power service providers, especially generation owners, entitled to get paid to recover their costs?; Do consumers need to pay for reactive power loads?; What roles should generators play in reactive power compensation?; etc., are often raised. This paper intends to provide answers by means of examples. This proposal suggests that the reactive power compensations are made by distribution and transmission companies and the generator reactive power capacities are reserved for contingencies. The reactive power compensation at distribution level is to keep load site power factor near unity. The transmission companies need to provide the required reactive power to ensure the proper power delivery in transmission network under normal conditions. Generators operate nearly at unity power factor under normal conditions. For contingencies, generators are responsible for the additional reactive power requirements.

Complete controllability of power system dynamics

Abstract: This paper summarizes our results of a study on the complete controllability of power systems. With a nonlinear dynamic power system model, it is shown that power systems are completely controllable within a region of the state space. In other words, with the available controls, a power system can be steered from one state to any other state within the complete controllability region. The study also provides a strategy for constructing the complete controllability region. The results imply that during emergencies, if the power system states are in the complete controllability region, the movement of the power system states can be directed toward a desired operating point so that events like a voltage collapse can be avoided.

Modeling of Short Circuit Power Consumption Using Timing-Only Logic Cell Macromodels

Abstract: This paper proposes an analytical modeling of power consumption in CMOS gates which is based on timing-only models. The proposed model is refined for the short circuit power dissipation as a function of input transition times, power supply voltage and output loading (C/sub L/) factor. The influence of the short circuit power dissipation can introduce an error of up to 25% in the average of dynamic power estimation. In this paper we model correctly this effect, with a minimum increase in the complexity of the model. Moreover, the same model used for timing analysis purposes can be used to investigate the total power consumption, including short circuit dissipation. The formulation is geared toward cell-oriented logic synthesis, which handles delays and signal slopes. The work shows the model connection between power components and the timing parameters computed at the switch or logic level. Results are presented showing the short circuit component as a fraction of total power for gates and circuits like buffers and adders.

A VHDL Behavioural Synthesis System Featuring Simultaneous Optimisation of Dynamic Power, Area and Delay

Abstract: Power dissipation has become one of the main concerns of the design industry today. Methods for reducing power consumption tend, however, to be used in an ad-hoc manner. This paper details the incorporation of a power optimisation criterion within the MOODS behavioural synthesis system which features an integrated incremental power estimation capability enabling the system to optimise a design based on independent, user-specified objectives for final area, delay, clock speed, and power consumption. The tool also incorporates a number of architectural features specifically targeted at reducing power which can be included automatically within any given design during synthesis. The resulting system has shown itself to be capable of reducing the energy consumption of a range of benchmark designs by between 3.5 and 7.0 times.

Application of Dynamic Power Supply Scaling in a Low-energy

Abstract: power supply scaling in an ATM (Asynchronous Transfer Mode) interface circuit is analyzed and simulated. Feedback is used to adjust the power supply based on how full the input buffer is. Either a DC-DC converter or multiple supply voltages can be used. Selftimed processing circuitry allows the feedback to control the, speed fairly precisely, even incorporating variations in process and operating conditions into the loop. The trade-offs and requirements for buffer size, converter response time, and control algorithm are discussed. Significant energy savings are possible if the power supply voltage can be adjusted quickly. A similar analysis can be used for applications other than an ATM interface.