Showing papers on "Electronic circuit simulation published in 1993"
TL;DR: Berkeley reliability tools (BERT) simulates the circuit degradation (drift) due to hot-electron degradation in MOSFETs and bipolar transistors and predicts circuit failure rates due to oxide breakdown and electromigration in CMOS, bipolar, and BiCMOS circuits.
Abstract: Berkeley reliability tools (BERT) simulates the circuit degradation (drift) due to hot-electron degradation in MOSFETs and bipolar transistors and predicts circuit failure rates due to oxide breakdown and electromigration in CMOS, bipolar, and BiCMOS circuits. With the increasing importance of reliability in today's and future technology, a reliability simulator such as this is expected to serve as the engine of design-for-reliability in a building-in-reliability paradigm. BERT works in conjunction with a circuit simulator such as SPICE in order to simulate reliability for actual circuits, and, like SPICE, acts as an interactive tool for design. BERT is introduced and the current work being done is summarized. BERT is used to study the reliability of a BiCMOS inverter chain, and performance data are presented. >
202 citations
TL;DR: The application of globally convergent probability-one homotopy methods to various systems of nonlinear equations that arise in circuit simulation is discussed and the theoretical claims of global convergence for such methods are substantiated.
Abstract: Efficient and robust computation of one or more of the operating points of a nonlinear circuit is a necessary first step in a circuit simulator. The application of globally convergent probability-one homotopy methods to various systems of nonlinear equations that arise in circuit simulation is discussed. The coercivity conditions required for such methods are established using concepts from circuit theory. The theoretical claims of global convergence for such methods are substantiated by experiments with a collection of examples that have proved difficult for commercial simulation packages that do not use homotopy methods. Moreover, by careful design of the homotopy equations, the performance of the homotopy methods can be made quite reasonable. An extension to the steady-state problem in the time domain is also discussed. >
184 citations
Book•
01 Aug 1993TL;DR: SPICE for Power Electronics and Electric Power, Third Edition illustrates methods of integrating industry standard SPICE software for design verification and as a theoretical laboratory bench to help students compare classroom results obtained with simple switch models of devices.
Abstract: Power electronics can be a difficult course for students to understand and for professors to teach. Simplifying the process for both, SPICE for Power Electronics and Electric Power, Third Edition illustrates methods of integrating industry standard SPICE software for design verification and as a theoretical laboratory bench. Helpful PSpice Software and Program Files Available for Download Based on the author Muhammad H. Rashids considerable experience merging design content and SPICE into a power electronics course, this vastly improved and updated edition focuses on helping readers integrate the SPICE simulator with a minimum amount of time and effort. Giving users a better understanding of the operation of a power electronics circuit, the author explores the transient behavior of current and voltage waveforms for each and every circuit element at every stage. The book also includes examples of all types of power converters, as well as circuits with linear and nonlinear inductors. New in this edition: Student learning outcomes (SLOs) listed at the start of each chapter Changes to run on OrCAD version 9.2 Added VPRINT1 and IPRINT1 commands and examples Notes that identify important concepts Examples illustrating EVALUE, GVALUE, ETABLE, GTABLE, ELAPLACE, GLAPLACE, EFREQ, and GFREQ Mathematical relations for expected outcomes, where appropriate The Fourier series of the output voltages for rectifiers and inverters PSpice simulations of DC link inverters and AC voltage controllers with PWM control This book demonstrates techniques of executing power conversions and ensuring the quality of the output waveforms rather than the accurate modeling of power semiconductor devices. This approach benefits students, enabling them to compare classroom results obtained with simple switch models of devices. In addition, a new chapter covers multi-level converters. Assuming no prior knowledge of SPICE or PSpice simulation, the text provides detailed step-by-step instructions on how to draw a schematic of a circuit, execute simulations, and view or plot the output results. It also includes suggestions for laboratory experiments and design problems that can be used for student homework assignments.
150 citations
27 Sep 1993
TL;DR: An overview of parasitic elements of consequence in linear IC design is followed by a straightforward methodology to include these physical considerations into the electrical schematic such that the circuit simulations will take these elements into account.
Abstract: Linear IC design requires an intimate understanding of how the physical circuit realization affects the electrical performance of the circuit. An overview of parasitic elements of consequence in linear IC design is followed by a straightforward methodology to include these physical considerations into the electrical schematic such that the circuit simulations will take these elements into account. A design example including normal simulation, parasitic simulation, and bench test results is presented. This methodology allows the designer to more completely describe the circuit and improve the chances for first time design success. >
65 citations
01 Jul 1993
TL;DR: This work presents a novel approach to analog circuit fault simulation and test generation by mapping the circuit and circuit-level faults to the discrete domain and performing an efficient fault simulation on this discretized circuit.
Abstract: The areas of analog circuit fault simulation and test generation have not achieved the same degree of success as their digital counterparts owing to the difficulty in modeling the more complex analog behavior. We present a novel approach to this problem by mapping the circuit and circuit-level faults to the discrete domain. An efficient fault simulation is then performed on this discretized circuit for the given input test waveform.
47 citations
20 Oct 1993
TL;DR: In this article, a new model for the simulation of power/ground plane noise which is simple in principle, accurate in its solutions, and applicable to various levels of high-speed digital electronics packaging, is given.
Abstract: A new model for the simulation of power/ground plane noise which is simple in principle, accurate in its solutions, and applicable to various levels of high-speed digital electronics packaging, is given. It is found that one can obtain accurate modeling of delta-I noise in power and ground planes without resorting to full-wave electromagnetic modeling. Sample results of the simulated delta-I noise with the method are shown. >
35 citations
18 May 1993
TL;DR: In this article, a semi-empirical CAD model for power IGBTs (insulated-gate bipolar transistors) which is physically based and uses subcircuit representation is presented.
Abstract: A semiempirical CAD (computer-aided design) model for power IGBTs (insulated-gate bipolar transistors) which is physically based and uses subcircuit representation is presented. The model has sufficient flexibility to account for the unique characteristics of IGBT operation, while still retaining a simple form with readily extractable model parameters. The model has been implemented into the ContecSPICE circuit simulator. A systematic way of determining model parameters has also been developed. A 500-V/20-A commercial IGBT (Motorola MGP20N50) is fully characterized to verify the validity of the model. Good agreement has been obtained between simulation and measurement for both DC and transient cases. >
31 citations
TL;DR: In this article, the authors used mixed-level physics-based device/circuit simulation software and semiconductor process simulator in the construction of predictive worst case process conditions for bipolar transistors currently being manufactured in AT&T 0.8 mu m BICMOS technology.
Abstract: The authors discuss the use of mixed-level physics-based device/circuit simulation software and semiconductor process simulator in the construction of predictive worst case process conditions for bipolar transistors currently being manufactured in AT&T 0.8- mu m BICMOS technology. Process fluctuations are introduced into the process simulator using the Latin hypercube (Monte Carlo) sampling method. The method is different from those in previous similar studies in that the compact device model parameter extraction step for each sample process is bypassed and active devices in the circuit are described by the physical device simulator rather than a compact model representation. This eliminates deficiencies associated with compact semiconductor device models. Furthermore, inaccuracies and difficulties introduced by compact model parameter extractions (especially for bipolar transistors) are also eliminated. The method is very useful in identifying critical process steps which determine the electrical performance of the devices and circuits. >
24 citations
01 Oct 1993
TL;DR: This paper shows how to obtain an equivalent circuit model for bipolar transistors and FEITs to generate a bias-dependent model and employed double balanced diode mixers, both active and passive FET mixers as well as a variety of oscillators to show that the nonlinear noise analysis capabilities are verified in these applications.
Abstract: This paper shows how to obtain an equivalent circuit model for bipolar transistors and FEITs to generate a bias-dependent model The bias-dependent model is required as a seed to obtain starting values for a large signal model Particularly in the case of calculating noise under large signal conditions, the bias-dependent noise parameters for both bipolar transistors and FETs have to be obtained For verification purposes, these methods have been implemented in the nonlinear circuit simulator, Microwave Harmonica We have employed double balanced diode mixers, both active and passive (switching) FET mixers as well as a variety of oscillators to show that the nonlinear noise analysis capabilities are verified in these applications
24 citations
TL;DR: In this article, an electrical-level model incorporating numerical analysis of the effects of quantum phenomena taking place at the cathode semiconductor-oxide interface is developed and discussed, and the model is validated by comparing results of the simulations with experimental data obtained with EEPROM cells.
Abstract: Conventional modeling of floating-gate electrically erasable programmable read-only memory (EEPROM) cells is shown to be inadequate to correctly evaluate the tunnel current flowing through the MOS injector during programming, essentially because of relevant quantum phenomena taking place at the cathode semiconductor-oxide interface. An electrical-level model incorporating numerical analysis of such effects is developed and discussed. The model is validated by comparing results of the simulations with experimental data obtained with EEPROM cells. The model of the MOS injector has been implemented in the circuit simulator SPICE. >
24 citations
TL;DR: A simple and accurate substrate current model that is valid in the whole operation region of a MOSFET with various dimensions is presented and incorporated in a Mitsubishi Circuit Simulator.
Abstract: A simple and accurate substrate current model that is valid in the whole operation region of a MOSFET with various dimensions is presented. The theory is based on hot-carrier induced impact ionization and band-to-band tunneling (BTBT). All the parameters in the model can be assigned proper physical meanings and are easily extracted from the measurement data. The model is incorporated in a Mitsubishi Circuit Simulator (MICS). Both the accuracy and the efficiency of the model are shown by experiment and simulation, and hence make the simulator useful for designers who care about low power applications. >
TL;DR: In this article, a method for characterizing microstrip interconnects and discontinuities through the method of moments applied to a mixedpotential integral equation is presented, which is greatly improved through the use of a recently published techniques for rapid evaluation of microstrip spatial Green's functions.
Abstract: Incorporates full-wave simulation of microstrip interconnects into circuit analysis and shows how predicted responses diverge from those based on models from a modern microwave-circuit CAD package. A method is presented for characterizing microstrip interconnects and discontinuities through the method of moments applied to a mixed-potential integral equation. The speed is greatly improved through the use of a recently published techniques for rapid evaluation of microstrip spatial Green's functions. A microstrip circuit element is analyzed separately with this procedure, and scattering parameters are extracted from the computed current density. These parameters are passed to a circuit simulator, where small- and large-signal analyses reveal how differences in interconnect modeling affect predicted responses. >
TL;DR: Algorithms for transient mixed-level circuit and device simulation using a full two-carrier three-dimensional device simulator SIERRA and the circuit simulator SPICE3 are presented and evaluated.
Abstract: Algorithms for transient mixed-level circuit and device simulation using a full two-carrier three-dimensional (3-D) device simulator SIERRA and the circuit simulator SPICE3 are presented. Circuit and device simulator coupling algorithms that are suited for two-dimensional mixed-level circuit and device simulation using direct solvers cannot be successfully employed when iterative solution techniques are used in 3-D device simulation. New algorithms to couple the circuit and 3-D device simulator have been developed and evaluated. The importance of 3-D mixed-level circuit and device simulation is demonstrated by applying it to single-event upset in CMOS SRAM cells. >
15 Mar 1993
TL;DR: Equivalent circuits of coupled Transmission lines, discontinuities in transmission lines, and a parallel-plate power plane configuration are obtained, which allow one to use a circuit simulator to model the crosstalk, reflection, and simultaneous switching noises that are common in computer packages.
Abstract: The electromagnetic modeling of the components of a computer package that contribute to noise on the signal lines in computer packages is discussed. Equivalent circuits of coupled transmission lines, discontinuities in transmission lines, and a parallel-plate power plane configuration are obtained. These equivalent circuits allow one to use a circuit simulator to model the crosstalk, reflection, and simultaneous switching noises that are common in computer packages. The finite difference time domain (FDTD) algorithm is used to obtain the full-wave electromagnetic field solutions from which the equivalent circuits are determined. >
30 Jun 1993
TL;DR: The presentation will be geared toward describing how designers can recognize and control common simulations problems and how circuits that can be very sensitive to simulator errors include oscillators and charge storage circuits such as switched-capacitor circuits.
Abstract: Techniques for controlling errors in circuit simulations are given. The presentation will be geared toward describing how designers can recognize and control common simulations problems. These errors, if not well controlled, can result in significant error. The circuit itself can either magnify errors made by the simulator and the models, or, conversely, it can be very tolerant of such errors. Circuits that can be very sensitive to simulator errors include oscillators and charge storage circuits such as switched-capacitor circuits.
TL;DR: In this article, a procedure for extracting the properties of device noise sources from experimental data can be implemented using commercially available circuit simulators, and it is shown that the two noise sources extracted from test data are largely uncorrelated provided that parasitic elements are de-embedded from the measurement.
Abstract: A procedure is presented for extracting the properties of device noise sources from experimental data. The extraction procedure can be implemented using commercially available circuit simulators. An example concerning a low-noise pseudomorphic high-electron-mobility transistor (HEMT) shows that the two noise sources extracted from experimental data are largely uncorrelated provided that parasitic elements are de-embedded from the measurement and that the sources are extracted in H-parameter format. >
07 Mar 1993
TL;DR: A new power electronics circuit simulator features a number of novel mathematical routines which result in fast and reliable operation and integrated with the simulator are schematic capture and plotting facilities.
Abstract: A new power electronics circuit simulator is described. The simulator features a number of novel mathematical routines which result in fast and reliable operation. The simulator runs under DOS and uses extended and virtual memory management so that large circuits and/or long simulation runs can be handled. Integrated with the simulator are schematic capture and plotting facilities. A number of example power electronic circuits are simulated to demonstrate the capabilities of the simulator. >
27 Sep 1993
TL;DR: This methodology was tested out in a benchmarking of six commercial circuit simulators from three CAE companies using a new circuit simulator benchmark suite called CircuitSim93.
Abstract: A circuit simulator benchmarking methodology is developed that follows the philosophy that one wants to exercise each of the simulators on each of the benchmark circuits and make a fair comparison of their performance. This methodology was tested out in a benchmarking of six commercial circuit simulators from three CAE companies using a new circuit simulator benchmark suite called CircuitSim93. >
01 Jan 1993
TL;DR: In this paper, the authors applied self-consistent device simulation using a thermodynamically rigorous electrothermal model implemented in the device/circuit simulator Simul to accurately predict the effects of self-heating in a power p-i-n diode.
Abstract: To accurately predict the effects of self-heating in a power p-i-n diode, we have applied self-consistent device simulation using a thermodynamically rigorous electrothermal model [1] implemented in the device/circuit simulator Simul [2]. Results of steady-state and high-voltage turn-off simulations with external electrical and thermal circuit elements are presented comparing the isothermal and self-heating cases.
01 Jan 1993
TL;DR: A mixed-mode device and circuit modeling environment has been developed that allows the combined simulation 1D, 2D and 3D devices together with SPICE-like circuit elements.
Abstract: A mixed-mode device and circuit modeling environment has been developed that allows the combined simulation 1D, 2D and 3D devices together with SPICE-like circuit elements. The work is based on the device simulator Simul [1] as well as the circuit simulator CAzM [2]. By extending Simul to handle simultaneously more than one device as well as giving it access to the circuit simulator’s functionalities it has been possible to combine both simulators’ features into a single program (1D, 2D, 3D devices, extensive physical models for power devices, thermal-electric effects and all basic SPICE models).
01 Jul 1993
TL;DR: This paper presents a methodology for analog system verification in the presence of parasitics using behavioral simulation, which is accurate to 0.005 LSB compared with SPICE, while being several orders of magnitude faster.
Abstract: In analog system design, final verification in the presence of parasitic loading effects is crucial to guarantee functionality of the entire circuit. In this paper, we present a methodology for analog system verification in the presence of parasitics using behavioral simulation. When applied to a synthesized 10 bit D/A, our approach is accurate to 0.005 LSB compared with SPICE, while being several orders of magnitude faster.
04 Oct 1993
27 Sep 1993
TL;DR: Experimental results are presented to verify that high-level modulator models capture the behavior of the analog circuits providing fast and accurate simulations for complex chip designs.
Abstract: A unified strategy for simulating systems with oversampling A/D converters is discussed. Experimental results are presented to verify that high-level modulator models capture the behavior of the analog circuits providing fast and accurate simulations. These results have been incorporated using a variety of simulation tools to aid in the design and verification of complex chip designs. >
01 Jan 1993
TL;DR: Heron and Lascelles as mentioned in this paper developed a dyadic Green's function for a Fabry-Perot resonator which consisted of a metallic planar reflector and a shallow spherical metallic reflector.
Abstract: Heron, Patrick Lascelles Modeling and Simulation of Coupling Structures for Quasi-Optical Systems. Under the direction of Michael B. Steer and James W. Mink Sponsored research was directed toward developing millimeter wave power sources utilizing quasi-optical techniques. A system consisting of an array of oscillators that radiated into a quasi-optical resonator was analyzed. Each oscillator was comprised of a solid state device and a radiating structure. A dyadic Green’s function was developed for a Fabry-Perot resonator which consisted of a metallic planar reflector and a shallow spherical metallic reflector. The Green’s function was applied to determine the driving point impedance matrix for an array of electrically small antennas within the resonator. An experimental X-band resonator was designed and fabricated, then one and two-port measurements were used to validate the theoretical calculations. A technique was determined for simulation of antennas that are not electrically small which radiate into the cavity. These techniques are shown to be applicable to coupling structures for quasi-optical systems in general. Practical considerations regarding the simulation of nonlinear solid state driving elements were addressed. A a technique for efficient Jacobian calculation using the multidimensional fast Fourier transform as well as a technique for simulator time-domain oversampling were developed so that multiple oscillator systems can be efficiently simulated. These simulation techniques were implemented and tested in a harmonic balance circuit simulator. I wish to dedicate this work to Karen. Without her patience, support, and sacrifice this work would not have been possible. I would like to thank Gregory Monahan for his assistance in design and construction of the experimental apparatus as well as for devising and applying the experimental measurement and de-embedding procedures. Gratitude is also due to Arthur Morris for his useful insights into electromagnetics and microwave systems. Finally, I wish to express my appreciation to the many largemouth bass who have waited patiently for this work to be completed. Biographical Summary Patrick L. Heron received the B.S.E.E. degree in 1983 from California State University Sacramento, the M.S.E.E. degree from University of Central Florida in 1987, and the Ph.D. in Electrical Engineering at North Carolina State University in 1993. From 1983 to 1987 he taught the Physics, Electrical Engineering, and Controls subjects at the United States Naval Nuclear Power School in Orlando, Florida. He is presently employed at Geophex Ltd. in Raleigh, NC. His research interests include, instrumentation and measurement, microwave and analog circuits, electromagnetics, and simulation of high speed circuits.
09 May 1993
TL;DR: In this paper, a switched capacitor circuit simulator, AWEswit, is presented, which exploits cyclical reconfiguration of switched capacitor circuits through a sequence of continuous-time circuits.
Abstract: A switched capacitor circuit simulator, AWEswit, is presented. AWEswit exploits the cyclical reconfiguration of switched capacitor circuits through a sequence of continuous-time circuits. It employs asymptotic waveform evaluation (AWE) to estimate the response of the state variables (capacitor voltages) in each switching phase. For accuracy, a horizontal Pade/spl acute/ sequence is employed to extract dominant pole models for the response of the state variables. In addition, a general technique for handling complications in the AWE analysis resulting from loops of voltage sources and capacitors is presented. This technique makes AWEswit compatible with the class of switched capacitor simulators that operate in the charge-voltage regime. Simulation results are presented.
06 Sep 1993
TL;DR: A method for the generation of circuit models for fast thermal-electrical simulation of 3D device structures with a circuit simulator is proposed and has been used for simulation of the influence of layout parameters on the Safe Operating Area of a BJT.
Abstract: A method for the generation of circuit models for fast thermal-electrical simulation of 3D device structures with a circuit simulator is proposed. It has been used for simulation of the influence of layout parameters on the Safe Operating Area of a BJT and to study the mechanisms that start breakdown processes. For a thermally instable switch-on behaviour of a BJT, a comparison with measurements has been made.
03 May 1993
TL;DR: An optimal technique (in terms of computational efficiency, accuracy, and practical applicability) for the transient simulation of distributed multiconductor RLGC lines is developed by applying the indirect numerical integration method.
Abstract: An optimal technique (in terms of computational efficiency, accuracy, and practical applicability) for the transient simulation of distributed multiconductor RLGC lines is developed by applying the indirect numerical integration method (the most efficient and accurate transient simulation method) to the device model for a distributed line (the most efficient and practically applicable model). The technique can be directly used in a circuit simulator. The computational complexity is linearly proportional to the number of time-steps. Nonuniform lines, lines with frequency-dependent parameters, and real lines, characterized with a few samples of time- or frequency-domain measurements or electromagnetic simulations, can be accurately and efficiently simulated. >
01 Jun 1993
TL;DR: A novel method for analyzing interconnect networks with nonlinear terminations is presented and results indicate that the method can approach the accuracy of SPICE3e2 with order of magnitudes less computing time.
Abstract: A novel method for analyzing interconnect networks with nonlinear terminations is presented. The circuit is partitioned into linear and nonlinear networks. A scattering parameter based macromodel is introduced to model the linear network. An efficient network reduction algorithm is developed to reduce the linear network into a network containing one multiport component (macromodel) together with sources and loads of interest. Exponentially Decayed Polynomial Functions (EDPF) are used to approximate the scattering parameters of the macromodel, which is always stable for stable circuits. In order to incorporate the macromodel into a SPICE like circuit simulator, a simplified recursive convolution formula is developed and Norton equivalent circuits are derived based on recursive convolution. Experiment results indicate that our method can approach the accuracy of SPICE3e2 with order of magnitudes less computing time.
03 May 1993
TL;DR: A significant improvement is made from previous piecewise linear simulators by the use of mixed symbolic/numeric time domain equations.
Abstract: Dual time scale systems such as /spl Delta/-/spl Sigma/ modulators, switching power converters, and phase-locked loops often take an excessive amount of computation time to simulate when using a circuit simulator and do not have sufficient accuracy when simulated with more efficient methods. A significant improvement is made from previous piecewise linear simulators by the use of mixed symbolic/numeric time domain equations. A comparison of the new method is made to a SPICE (simulated program with IC emphasis) circuit simulator and to experimental measurements of a /spl Delta/-/spl Sigma/ modulator analog front-end. >