Showing papers on "FET amplifier published in 1981"

GaAs FET large-signal model and its application to circuit designs

Abstract: A large-signal GaAs FET model is derived based on dc characteristics of the device. Analytical expressions of modeled nonlinear elements are presented in a form convenient for circuit design. Power saturation and gain characteristics of a GaAs FET are studied theoretically and experimentally. An oscillator design employing the large-signal model is demonstrated.

Variable power amplifier

Abstract: A plurality of FET or other amplifiers are connected between respective outputs of an N output port power divider network and respective inputs of an N input power combining network in a variable power amplifier system. A gate bias is selectively supplied to each of the amplifiers which is either at a first value to cause the amplifier to amplify or at a second value to cause the amplifier to be cut off and therefore to not dissipate any DC power. The number of amplifiers receiving the first potential is determinative of the amount of power amplification of the variable power amplifier.

Monolithic GaAs travelling-wave amplifier

Abstract: A monolithic GaAs travelling-wave amplifier with distributed input and output lines is described, and its experimental performance in the 0.5-14 GHz range is reported.

Performance and Design of Microwave FET Harmonic Generators

Abstract: Experimental measurements of the power gain of a 4- to 8-GHz frequency doubler, employing a single-gate GaAs MESFET device and a microstrip circuit, are reported. The measured performance provides design guidelines, and is explained in terms of FET characteristics. In particular, the multiplication gain is largest when the FET is biased near pinchoff.

Solid state autotune power amplifier

Abstract: A solid state, band-pass filtered, RF power amplifier for equalizing the response of an amplified RF signal across the entire tuning range of a multi channel transmitter is disclosed. An RF signal is applied to the input of a low noise FET amplifier with a portion of the signal coupled off into a frequency counter which in conjunction with a digital switching logic selects a path through a band-pass filter having characteristics that reduce the broadband noise of the RF signal passed therethrough. Additionally, a dual directional coupler samples the output of the power amplifier with the forward sampled signal being used to control the amplifier output to a preselected level and the reverse sampled signal being used to reduce the amplifier output signal in proportion to an increase in the voltage standing wave ratio load between the amplifier and the transmit/receive switch.

Audio-frequency power amplifier

Abstract: A bridged transformerless power amplifier comprises main (10, 12) and inverse (18, 20) amplifier units having the same structure but producing outputs which are inverted relative to each other. A low-impedance load (28) is directly connected between the output ports of the main and inverse amplifier units. A first operation control circuit (SWO, SW3, SW4) activates only the main amplifier unit after the power switch is turned on, and a second operation control circuit (SW5) maintains the output port of the inverse amplifier unit in a floating state for a predetermined period of time after the activation of the main amplifier unit has begun. Hence, the power amplifier produces no pop noise when the power supply is switched on.

A GaAs monolithic low-noise broad-band amplifier

Abstract: Describes the design, fabrication, and performance of GaAs monolithic low-noise broad-band amplifiers intended for broadcast receiver antenna amplifier, IF amplifier, and instrumentation applications. The process technology includes the use of Czochralski-grown semiinsulating substrates, localized implantation of ohmic and FET channel regions, and silicon nitride for passivation and MIM capacitors. The amplifiers employ shunt feedback to obtain input matching and flat broad-band response. One amplifier provides a gain of 24 dB, bandwidth of 930 Mhz, and noise figure of 5.0 dB. A second amplifier provides a gain of 17 dB, bandwidth of 1400 MHz, and noise figure of 5.6 dB. Input and output VSWR's are typically less than 2:1 and the third-order intercept points are 28 and 32 dB, respectively. Improved noise figure and intercept point can be achieved by the use of external RF chokes.

GaAs Fet Ultrabroad-Band Amplifiers for Gbit/s Data Rate Systems

Abstract: A novel ultrabroad-band amplifier configuration suitable for GaAs FET's has been developed. The developed amplifier circuit operates as a capacitor-resistor ( C-R ) coupled mnpfifier circuit in the low-frequency range in which |S/sub 21/| for the GaAs FET's is constant. It also operates as a lossless impedance matching circuit in the microwave frequency range in which |S/sub 21/| for the GaAs FET has a slop of approximately -6 dB/octave. Using this configuration technique, 800-kHz 9.5-GHz band (13.5 octaves), 8.6-dB gain GaAs FET amplifier modules have been realized. The amplifier module has 40-ps step response rise time. It also has low input and output VSWR. By cascading two-amplifier modules, 19-dB gain over the 800-kHz to 8.5-GHz range and 50-ps step response rise time were obtained. NF is lower than 8 dB over the 50-MHz to 6-GHz range.

Low noise differential amplifier

Abstract: A low noise amplifier circuit (FIGS. 4 and 5) is disclosed including plural differential amplifiers having their inputs and outputs connected to common input and output lines (50, 52; 54, 56). In the disclosure, each differential amplifier is comprised of a pair of bipolar junction transistors (40, 42; 58, 60; 64, 66) of the same type. Parallel connecting of the differential amplifiers in the disclosed fashion reduces the Johnson noise introduced by the base spreading resistances of the individual transistors. Since differential amplifiers, per se, are connected in parallel rather than their component transistors, thermal runaway is not a problem.

Threshold voltage control network for integrated circuit field-effect trransistors

Abstract: A threshold voltage control circuit controls the threshold voltages of one or more field-effect transistors (FETs) of an integrated circuit. The threshold voltage control circuit includes a reference (FET) which is electrically connected to the other FETs so that the threshold voltage of the reference FET determines the threshold voltages of the other FETs. A bias voltage is applied to a gate of the reference FET and a current path is established between first and second supply terminals. This current path includes the drain and source of the reference FET. The current flowing in the current path is a function of the bias voltage applied to the gate of the reference FET and the threshold voltage of the reference FET. A high gain, high input impedance amplifier is connected to the current path and provides a threshold control signal to the reference FET (and the other FETs) which is a function of the current in the current path. The threshold control signal causes the threshold voltage of the reference FET to attain a value which maintains a predetermined current flow in the current path.

Bandpass filter with an active element

Abstract: An amplifier including an in phase feedback signal to therefore exhibit negative resistance is receptive of an input alternating signal which includes a frequency F. The output of the amplifier is coupled to a resonator adjusted to a center frequency F and having undesirable resistance which is offset by the negative resistance of the amplifier. The resonator includes an inductor and adjustable capacitor arranged either in series or in parallel with the amplifier to therefore change the value of F.

Linear transconductance amplifier

Abstract: A linear transconductance amplifier includes a differential transconductance amplifier stage and a differential correction amplifier stage. In order to achieve linear operation over a wide dynamic range, the nonlinearities generated in the transconductance amplifier stage are substantially cancelled by the nonlinearities generated in the correction amplifier stage. This is accomplished by cross-coupling the two stages and establishing the relative gain of the correction amplifier stage with respect to the transconductance amplifier stage such that the desired cancellation occurs. In a preferred embodiment, optimum cancellation occurs when the gain of the correction amplifier stage is substantially one-half the gain of the transconductance amplifier stage.

FET Microwave oscillator being frequency stabilized by capacitive reactance micro-strip stub line

Abstract: A microwave oscillator circuit with an FET, a dielectric resonator and a micro-strip line has a capacitive reactance element connected between the source terminal of the FET and ground or between the source and drain terminals of the FET, so that the oscillation frequency fluctuations due to the power supply voltage fluctuations or the ambient temperature variations can be suppressed.

Mechanical valve analog

Abstract: A device suitable for use as an electrical analog of a unidirectional mechanical valve includes a three-terminal MOSFET. A sensing comparator has inputs coupled to the drain and source terminals of the FET, and an output coupled to the gate of the FET. A floating power supply allows the analog to operate independently of the circuit in which it is used. The FET will conduct current whenever the voltage from the drain to the source exceeds a threshold value, and will effectively act as an open circuit whenever the drain to source voltage is less than this threshold.

Dual-Gate MESFET Variable-Gain Constant-Output Power Amplifier

Abstract: The use of a dual-gate GaAs FET as a broad-band variable gain and constant output power amplifier is described. A five-stage variable gain-constant output power amplifier has been realized which provides a constant output power of 3 dBm (/spl plusmn/2 dB) for a large dynamic range of input power of -45 dBm to 0 dBm over the 4-8-GHz band. The amplifier uses a feed-forward AGC circuit for preadjusting the gain of the amplifier stages depending upon the strength of the signal at the output of preceding stages. The amplifier has the capability of detecting two or more simultaneous RF pulses having different amplitudes and separated by more than 15-ns time intervals. Also it preserves any amplitude modulation of the individual pulse.

Performance comparison of heterojunction phototransistors, p-i-n FET's, and APD-FET's for optical fiber communication systems

Abstract: An analysis of the sensitivity of InGaAs/InP bipolar heterojunction phototransistors (HJPT's) used in pulse code modulated optical communications systems is presented. The minimum detectable power of an HJPT biased at the optimum level is found to increase linearly with bit rate B while because of the fixed transconductance of the FET amplifier, the minimum detectable power of a p-i-n FET increases as B^{3/2} . It is shown that HJPT's can thus have higher sensitivity than p-i-n FET detectors, particularly at high bit rates, and can have comparable sensitivity to APD-FET detectors.

Resistive gate FET flip-flop storage cell

Abstract: An improved bistable FET circuit is disclosed which employs a reduced number of device elements and occupies less space in an integrated circuit. The flip-flop circuit includes the FET device having its source connected to a first potential and a second FET device having its source also connected to the first potential. The first FET device has a gate electrode composed of a resistive material with the first side connected to the drain of the second FET device and the second side connected to a second potential. The second FET device has a gate electrode comprised of a resistive material with the first side connected to the drain of the first FET device and a second side connected to the second potential. In this manner, the resistive gate of the first device serves as the load for the second device and the resistive gate of the second device serves as the load for the first device. Application of this circuit to electrically programmable PLA's and to random access memories is disclosed.

Push-pull amplifier

Abstract: A current path is provided in a class B push-pull amplifier for maintaining a low level bias current to each output transistor even during its normally off state.

Active compensation of op-amp inverting amplifier using NIC

Abstract: It is shown that it is theoretically possible to extend the bandwidth of an op-amp inverting amplifier to near infinity with the help of an additional resistor and an ideal negative impedance converter (NIC).

Voltage comparator using unequal gate width FET's

Abstract: The threshold comparator includes a switching FET including a gate electrode and a load FET connected in series across a source of potential where the load FET is configured to provide a saturation current less than that of the switching FET with a first input level to the gate electrode and provide a saturation current greater than that of the switching FET with a second input level to the gate electrode The output voltage of the switching FET changes value abruptly when the input level at its gate electrode attains the second input level where the saturation current in the switching FET is less than the saturation current of the load FET

Low-noise 10.7 GHz cooled GaAs FET amplifier

Abstract: A three-stage gallium-arsenide field-effect transistor amplifier giving a noise temperature of 29 K (0.4 dB noise figure) at a physical temperature of 13 K is described. The amplifier utilises a novel modular construction with coaxial air-lines, sliding λ/4 transformers, and packaged NE13783 and MGF1403 FETs. Noise parameters of these devices at 300 K and 13 K are reported.

Wideband monolithic microwave amplifier study

Abstract: : This report discusses distributed amplifier theory in the context of the microwave monolithic GaAs circuit. It is shown that GaAs FET devices dictate that both the input and output transmission lines become lossy which places fundamental limitations on the distributed amplifier concept and results in different constraints than are found in lossless distributed amplifier design. First order theory indicates that gain asymptotically approaches an upper bound and little benefit results from increasing the number of devices beyond certain limits. (Author)

Application of feedback techniques to the realisation of hybrid and monolithic broadband low-noise-and-power GaAs FET amplifiers

Abstract: The implementation of ultrabroadband low-noise GaAs FET amplifiers operating up to 20 GHz is shown to be possible with the use of a low-parasitic high-gm device, which can only be implemented using monolithic circuit techniques. An example of a 0.1 to 6 GHz hybrid low-noise amplifier to illustrate the circuit technique is described.

Design, fabrication, and characterization of monolithic microwave GaAs power FET amplifiers

Abstract: The design, fabrication, and characterization of three- and four-stage monolithic GaAs power FET amplifiers are described. Each of the amplifier chips measures 1 mm × 4 mm. Procedures for characterizing these monolithic amplifiers are outlined. Output powers of up to 1 W with 27-dB gain were achieved with a four-stage design near 9 GHz. The circuit topologies used were flexible enough to allow external bondwires to be used as shunt inductors for amplifier operation at C- or S-bands. An output power of 2 W with 28-dB gain and 36.6-percent power-added efficiency was achieved at 3.5 GHz, using a modified four-stage amplifier.

GaAs FET distributed amplifier

Abstract: The design and construction of a GaAs FET distributed amplifier with a bandwidth of 6 GHz is described The amplifier provides an input VSWR of less than 1.8:1 and noise figure of 3–6 dB The possibility of bandwidth extension is discussed.

A GaAs monolithic broadband amplifier

Abstract: RECENT DEVELOPMENTS in GaAs material technology and the application of ion-implantation to the fabrication of GaAs FET monolithic integrated circuits has resulted in a rapid reduction in the cost of these components, and makes possible their introduction into the consumer area. This paper will describe the design, fabrication and performance of a GaAs monolithic broadband amplifier intended primarily for use as an antenna amplifier for broadcast receivers.

GaAs power FET for K-band operation

Abstract: A report on a 1.35mm gatewidth GaAs power FET that has produced 675mW with 5.8dB gain at 20.5GHz as an amplifier and 200mW at 25GHz as an oscillator, will be presented.

K-Band High-Power GaAs FET Amplifiers

Abstract: Lumped-element internal matching techniques were successfully adopted for K-band power GaAs FET amplifiers. The developed 18-GHz band two-stage amplifier provides 1.05-W power output at 1-dB gain compression and 1.26-W saturated power output with 8.1-dB small-signal gain. The 20-GHz band single-stage amplifier has 1.04-W power output with 3-dB associated gain. Lumped-element internal matching circuit design as well as amplifier fabrication are described. Intermodulation distortion and AM-to-PM conversion characteristics are also presented.

High speed line driver with ground output capability

Abstract: An FET driver circuit is disclosed which provides short circuit protection at the output node without reducing its performance. Grounded short circuit protection is achieved by sharing a load resistance at the output node in two parallel components, a low resistance active FET load and a high resistance active FET load. A delay element is inserted between the data input node and the gate for the low resistance active FET load. When the data input is low, both of the active FET load devices are off and the active logical FET device is on causing a low output value for the circuit. When the data input for the circuit goes high, the output capacitance is initially charged by the high resistance FET load device and is followed after a short delay, by charging through the low resistance FET load device. The low resistance FET load device cuts off current flow automatically after a predetermined period of time transpires. This delay duration is designed to be equal to or greater than the desired output rise time for the circuit, and less than the time required to destroy the low resistance device if it were to have its output terminal grounded. Thus, if the output of the circuit is accidentally shorted to ground, the circuit is protected because the brief on-time of the low resistance device limits power dissipation below destructive levels, and because the short circuit current in the high resistance device is of insufficient magnitude to cause problems.

Integrated amplifier arrangement

Abstract: An integrated amplifier arrangement in which the d.c. voltage gain is suppressed, which includes two transistors arranged as a differential pair with an output between the collectors of these transistors. In order to improve the high-frequency properties of the amplifier arrangement, the collector circuit of the transistors includes two load transistors in cascade with the two transistors arranged as a differential pair, each load transistor including an impedance in its base circuit in order to obtain an inductive input impedance on the emitter side of the transistor. In order to obtain direct-current and low-frequency negative feedback for eliminating the d.c. gain, the base electrodes are cross-coupled to the collector electrodes of the load transistors.